{"id":3487984,"url":"https://alion.io/job/argotec-rd-digital-fpga-design-engineer","title":"R&D Digital FPGA Design Engineer","company":{"id":2568581,"name":"Argotec","domain":"argotecgroup.com","url":"https://alion.io/company/argotecgroup","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Mauro Torinese, Italy"],"countries":["IT"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":45000,"max":60000,"currency":"EUR","period":"year","gross":null,"usd_annual":67028},"salary_estimate":null,"experience_years_min":2,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Git","optional":false},{"name":"Jira","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-10-29T22:19:12Z","employer_posted_date":"2026-10-29","last_verified_at":"2026-11-02T03:28:18Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"To support our Company’s growth, we are looking for a motivated R&D Digital FPGA Design Engineer to expand a rapidly growing team within our Research and Development Unit. Reporting directly to the Lead of the R&D Avionics team, you will work on inspirational projects, contributing to the development of new products and technologies in support of next generation’s space assets.The focus will be on designing and developing HDL for On-Board Computers, Power Systems, and Telecommunication solutions, intended for both Earth's orbit and deep-space missions, including the Moon and Mars.\nDUTIES\nAs an R&D Digital FPGA Design Engineer you will contribute to the design, development and prototyping of digital architecture for space applications, supporting the evolution of innovative solutions from system requirements through implementation, validation and testing.\nThe activities will include (but not limited to):\nDesign and develop FPGA architectures starting from system-level requirements;\nValidate digital architecture through simulation and verification activities;\nPerform FPGA implementation, integration, and testing activities;\nDebugging and bug tracking for developed architecture;\nTiming and power optimization of FPGA architectures;\nContribute to product development activities and project planning, working closely with cross-functional engineering teams.\nGENERAL REQUIREMENTS\nMaster’s degree in Electronic Engineering, Computer Science, or related technical fields;\nAt least 2+ years of experience in a similar role;\nExcellent communication skills and ability to collaborate with cross-functional teams;\nExcellent written and oral communication in English;\nProactive mindset and commitment to continuous learning and professional growth.\nREQUIRED EXPERIENCES & SKILLS\nVery good understanding of digital hardware design;\nVery good understanding of C, C++, SystemVerilog, Python;\nVery good understanding of VHDL or Verilog;\nGood knowledge of FPGA development methods and processes;\nKnowledge of laboratory instrumentation for prototyping and testing;\nKnowledge of debug tools for and testing with hardware in the loop;\nStrong analytical mindset and structured problem-solving approach;\nAbility to manage multiple priorities and technical challenges under tight deadlines.\n ADDITIONAL ASSETS\nExperience with Universal Verification Methodology (UVM);\nExperience in embedded software development (C/C++);\nKnowledge of Xilinx AMD, Radiant and Microsemi IDEs;\nKnowledge of digital interface standards for intra-board and inter-board IO;\nUsage of versioning systems (Git, Jira);\nKnowledge of scripting languages (TCL).\nWHY JOIN ARGOTEC?\nOpportunity to work with highly motivated colleagues in a very innovative environment.\nProfessional training and career development opportunities.\nFlexible working time schedule and a hybrid work policy.\nMonthly \"Free-Day\" - every second Friday: time off to dedicate to your family and/or hobbies.\nA diversified community that organizes extra-work and fun activities.\nSALARY RANGE:\n45.000 - 60.000 EUR\nArgotec reserves the right to assess the appropriate job level and compensation package based on objective criteria emerging throughout the selection process. These evaluations will be carried out in alignment with the candidate’s seniority, skills, and experience, as well as with the scope and responsibilities of the role. Any compensation proposal will be defined in compliance with the principles of fairness, transparency, and equal opportunity, in accordance with applicable regulations.\nOur selection process is built on impartiality, transparency, and equal opportunity, ensuring that every candidate is evaluated based on skills, experience, and potential. As part of our commitment to inclusivity, we actively encourage applications from individuals belonging to protected categories (Law 68/99). \nAt Argotec, we’re proud to be an equal opportunity employer. We celebrate diversity and inclusion, welcoming individuals of all backgrounds. This opportunity is open to everyone, regardless, for instance, of ethnic or cultural background, color, religion, sex, gender identity, sexual orientation, or national origin.\nJoin us in a workplace where everyone belongs.\nThis announcement is aimed at both sexes, under laws 903/77 and 125/91, and to people of all ages and all nationalities, under legislative decrees 215/03 and 216/03.","description_format":"text","description_chars":4387,"description_truncated":false,"requirements":{"experience_years_min":2,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":false}]},"benefits":["Continuous learning","Flexible schedule","Hybrid work"],"hiring_locations":[{"name":"Italy","iso":"IT","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Space & Aerospace","Satellite Manufacturing"],"lifecycle":[{"event":"open","at":"2026-10-29T22:19:12Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":3,"expected_fill_days":25,"reasons":["conf:2","velocity","win:early","comp:junior"],"computed_at":"2026-11-02T06:13:15Z"},"pay":{"stated_usd_annual":67028,"is_top_pay":false},"html_url":"https://alion.io/job/argotec-rd-digital-fpga-design-engineer","json_url":"https://alion.io/job/argotec-rd-digital-fpga-design-engineer.json","meta":{"generated_at":"2026-11-02T12:44:48Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":17345,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-03T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2568581},"rest":"https://alion.io/mcp/rest/get_company?id=2568581"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fargotec-rd-digital-fpga-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fargotec-rd-digital-fpga-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fargotec-rd-digital-fpga-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/argotec-rd-digital-fpga-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fargotec-rd-digital-fpga-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3487984}},{"tool":"search_jobs","arguments":{"company":"argotecgroup.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3487984},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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