{"id":1303002,"url":"https://alion.io/job/ast-science-asic-design-engineer","title":"ASIC Design Engineer","company":{"id":2057930,"name":"AST SpaceMobile","domain":"ast-science.com","url":"https://alion.io/company/ast-science","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"C","score":65,"open_postings":203,"ghost_share":0.581,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-09-28T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Edinburgh, United Kingdom"],"countries":["GB"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"MATLAB","optional":true}],"status":"live","first_seen_at":"2026-04-15T11:38:58Z","employer_posted_date":"2026-07-07","last_verified_at":"2026-09-29T02:55:10Z","board_verified":true,"closed_at":null,"days_open":166,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":165},"description":"AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for both commercial and government applications. Our engineers and space scientists are on a mission to eliminate the connectivity gaps faced by today’s five billion mobile subscribers and finally bring broadband to the billions who remain unconnected.\nPosition Overview\nWe are seeking an ASIC Design Engineer to contribute to the design and implementation of complex silicon solutions used in AST’s space-based communications systems.\nThe Silicon Team in Edinburgh is a small, highly focused group responsible for developing high-value silicon that is core to AST’s mission of “Connecting the unconnected” - delivering the world’s first space-based mobile broadband network.\nThe team works collaboratively to define and build next-generation silicon, exploring advanced silicon technologies to continuously improve performance, capability, and efficiency. This is a hands-on environment where silicon decisions directly impact AST’s ability to deliver a global communications network from space.\nIn this role, you will focus on high-quality RTL development, micro-architecture definition, and close collaboration across engineering disciplines. You will work alongside architecture, verification, and system teams-both internal and external-to deliver robust, high-performance ASIC and SoC designs from concept through tape-out.\nKey Responsibilities:\nCreate high-quality micro-architecture specifications and RTL code.\nContribute to SoC integration and subsystem development.\nWork with internal and external stakeholders, including architecture, verification, and software teams.\nParticipate in design reviews, providing technical input.\nEnsure alignment with requirements and design best practices.\nQualifications\nEducation:\nBEng in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.\nExperience:\nDeep knowledge of hardware and digital design fundamentals.\nStrong SystemVerilog knowledge.\nExperience with SoC integration.\nPrior experience on complex RTL designs such as high-speed I/O, CPUs, accelerators, or complex network-on-chip implementations.\nAbility to write clear, high-quality micro-architecture specifications.\nCompetency in Python scripting or programming.\nPreferred Qualifications:\nMaster’s or PhD degree in a relevant technical discipline.\nExperience on large SoC / ASIC designs.\nRF knowledge is a strong plus.\nUnderstanding of digital signal processing.\nExperience with MATLAB is a plus.\nBackground in communications or mobile silicon system design.\nSoft Skills:\nAbility to collaborate closely with architecture, verification, software, and system teams.\nAbility to work effectively with internal and external stakeholders.\nAbility to provide technical input during design reviews.\nTechnology Stack:\nSystemVerilog\nPython scripting or programming\nMATLAB\nPhysical Requirements\nAbility to work in a standard office environment and use a computer for extended periods.\nOccasional travel may be required to visit suppliers or other AST SpaceMobile design centers.\nThis job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands. \nAST SpaceMobile is an Equal Opportunity, at will Employer; employment is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.","description_format":"text","description_chars":3841,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Telecommunications"],"lifecycle":[{"event":"open","at":"2026-09-26T12:21:47Z"}],"liveness":{"score":3,"band":"cold","label":"Long shot","p_open":1,"p_active":0.11,"p_room":0.28,"age_days":165,"expected_fill_days":21,"reasons":["conf:0","stale_co","velocity","ghost","win:tail","crowd:brand"],"computed_at":"2026-09-28T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/ast-science-asic-design-engineer","json_url":"https://alion.io/job/ast-science-asic-design-engineer.json","meta":{"generated_at":"2026-09-29T04:42:28Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":4461,"day_limit":5000,"remaining_today":539,"minute_limit":60,"resets_at":"2026-09-30T00:00:00Z"}}}