{"id":3929769,"url":"https://alion.io/job/astera-labs-director-post-si-electrical-validation-engineering","title":"Director Post-Si Electrical Validation Engineering","company":{"id":178069,"name":"Astera Labs","domain":"asteralabs.com","url":"https://alion.io/company/astera-labs-2","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":81,"open_postings":50,"ghost_share":0,"stale_share":0.56,"repost_share":0,"time_to_fill_p50_days":77,"computed_at":"2026-11-07T05:47:08Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"head","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":210000,"max":275000,"currency":"USD","period":"year","gross":null,"usd_annual":275000},"salary_estimate":null,"experience_years_min":12,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"NVLink","optional":false},{"name":"BERT","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-11-07T20:28:11Z","employer_posted_date":"2026-11-07","last_verified_at":"2026-11-08T04:21:28Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.\nAstera Labs is seeking a Director of Post-Si Electrical Validation Engineering to lead the development, bring-up, and validation of ASIC SerDes and PCIe PHY products that enable rack-scale AI infrastructure. Working closely with ASIC, systems, firmware, signal integrity, power integrity, mechanical, thermal, manufacturing, and customer engineering teams, you will guide products from concept and architecture through qualification and mass production. \nThis is a hands-on leadership role in a fast-moving environment. You will lead a talented engineering team while stepping in to solve complex technical problems, engage directly with customers, and improve hardware development processes. Your work will help ensure Astera Labs’ connectivity and memory products deliver reliable, high-performance systems for cloud service providers, server manufacturers, and networking OEMs. \nKey Responsibilities \n Board Product Strategy and Technical Leadership \nLead ASIC Electrical-level (PHY) validation strategy across product definition, architecture, PCB/test fixture development, Validation Automation, data review, bring-up, debug, optimization, qualification, and production release. \n\nDefine validation plans, coverage goals, risk assessments, schedules, and exit criteria for high-speed ASIC and PHY IP \n\nMake hands-on technical contributions to unblock critical design, validation, and customer issues in a dynamic, fast-paced environment. \n\nHigh-Speed SerDes Validation \nDirect ASIC Power-On and bring-up, silicon/PCB debug, PVT characterization, margin analysis, and performance optimization across voltage, temperature, channel, and workload conditions. \n\nValidate high-speed NRZ and PAM4 SerDes-based protocols, including PCIe Gen 3 and above \n\nApply signal/power integrity, SerDes/PHY knowledge, coding, and lab expertise to identify risks and drive practical solutions across circuits, power distribution, connectors, sockets, and cables. \n\nCross-Functional and Customer Execution \nPartner with ASIC, system validation, firmware, systems, mechanical, thermal, quality, compliance, manufacturing, and customer engineering teams to deliver robust products. \n\nEngage key internal customers to understand system requirements, evaluate form factors, propose complete board solutions, and resolve issues through production support. \n\nCollaborate with external vendors for test equipment, bench sockets, temperature forcing units, RF cables, PCB vendors, and related suppliers to ensure validation platforms are automated, robust, and scalable. \n\nTeam Development and Productization \nBuild, mentor, and develop a high-performing engineering team while establishing clear ownership, technical standards, and execution mechanisms. \n\nDrive products from concept to mass production, including validation data reviews, code/automatin reviews, validation reporting, documentation, and post-production support. \n\nImprove post-Silicon development processes and methodologies, share lessons learned, and reuse validation best practices across Astera Labs’ connectivity and memory product portfolio. \n\nBasic Qualifications \nBachelor’s degree in Electrical Engineering or a related technical field. Master’s degree in Electrical Engineering preferred. \n12 - 15+ years of relevant experience, consistent with Astera Labs’ standardized Director level. \nTechnical management experience leading design, validation, product, or system engineering teams. \nExperience with high-speed serdes PHY Validation over PVT conditions and taking products from concept to validation plan, validation, production release and post-production support. \nStrong background in high-speed SerDes IP validation and PHY tuning, signal/power integrity, and automation using common lab equipment such as high-speed oscilloscopes, BERTs, and VNAs \nEntrepreneurial, open-minded behavior and can-do attitude. Think and act with the customer in mind! \nStrong cross-functional collaboration, technical communication, prioritization, and independent problem-solving skills. \nPreferred Qualifications. \nExperience leading SoC Debug and development for high-speed interfaces such as PCIe5, PCIe6 or PAM4 802.3 Ethernet. \nWorking knowledge of key, high-speed PHY design blocks such as PLL’s, DFE, Tx EQ,FFE, CDR, etc and signaling concepts such as PAM4 \nStrong python scripting ability: knowledge of object-oriented programming and basic dev ops using git for source control and collaboration \nDeep background in developing bench automation techniques, preferably using Python, with emphasis on execution efficiency, repeatability, and data analysis. \nProficiency using high-speed lab equipment such as BERT, Oscilloscope, and VNA \nStartup experience and a proactive, hands-on, customer-focused approach to solving complex problems. \nSalary range is $210,000 to $275,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.\nWe know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.","description_format":"text","description_chars":6032,"description_truncated":false,"requirements":{"experience_years_min":12,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware"],"lifecycle":[{"event":"open","at":"2026-11-08T00:04:38Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 77 · green card filings: 7","filings_12m":77,"filings_prev_12m":50,"green_card_filings_12m":7,"median_offered_wage_usd":168155,"route":null,"cap_exempt":false,"checked_at":"2026-11-07T07:57:00+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":77,"reasons":["conf:0","win:early","comp:brand"],"computed_at":"2026-11-08T04:29:02Z"},"pay":{"stated_usd_annual":275000,"is_top_pay":true},"html_url":"https://alion.io/job/astera-labs-director-post-si-electrical-validation-engineering","json_url":"https://alion.io/job/astera-labs-director-post-si-electrical-validation-engineering.json","meta":{"generated_at":"2026-11-08T04:29:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":9686,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-09T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":178069},"rest":"https://alion.io/mcp/rest/get_company?id=178069"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fastera-labs-director-post-si-electrical-validation-engineering"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fastera-labs-director-post-si-electrical-validation-engineering"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fastera-labs-director-post-si-electrical-validation-engineering"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/astera-labs-director-post-si-electrical-validation-engineering\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fastera-labs-director-post-si-electrical-validation-engineering"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3929769}},{"tool":"search_jobs","arguments":{"company":"asteralabs.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3929769},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}