{"id":577922,"url":"https://alion.io/job/astera-labs-principal-emulation-engineer-3","title":"Principal Emulation Engineer","company":{"id":178069,"name":"Astera Labs","domain":"asteralabs.com","url":"https://alion.io/company/astera-labs-2","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":81,"open_postings":50,"ghost_share":0,"stale_share":0.56,"repost_share":0,"time_to_fill_p50_days":77,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":192000,"max_usd":356000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":656},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"NVLink","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Cadence Palladium","optional":true},{"name":"Siemens Veloce","optional":true},{"name":"Synopsys HAPS","optional":true},{"name":"Synopsys ZeBu","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-09-09T18:01:55Z","employer_posted_date":"2026-09-23","last_verified_at":"2026-11-08T16:35:47Z","board_verified":true,"closed_at":null,"days_open":59,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":59},"description":"Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.\nPrincipal Emulation Engineer - San Jose, CA \nRole Overview \nAs a Principal Emulation Engineer, you will build and operate emulation environments that let verification teams stress-test complex ASICs before silicon. You’ll partner closely with design, verification, firmware, and systems engineers to model hardware-software interactions, exercise high-speed protocols, and isolate issues across RTL, transactors, test environments, and code. Your hands-on leadership will turn difficult debug problems into actionable fixes and improve confidence in each product milestone. \nAstera Labs is accelerating the infrastructure behind AI by delivering purpose-built connectivity solutions for rack-scale systems. In this role, you’ll help validate the switching, PCIe, Ethernet, memory, and storage interfaces that connect the compute fabric-enabling faster bring-up, stronger interoperability, and more reliable platforms as the company scales. \nKey Responsibilities \nEmulation and Prototyping \nArchitect, build, and maintain emulation environments for complex ASICs and SoCs. \nIntegrate RTL, transactors, protocol models, software, and test infrastructure to enable meaningful hardware-software co-simulation. \nEnable verification teams to stress-test designs with scalable, repeatable emulation workflows. \nDevelop reusable models, utilities, and debug methodologies that accelerate pre-silicon validation. \nProtocol and SoC Verification \nVerify hardware-software interfaces and system behaviors in partnership with logic designers, firmware engineers, and verification teams. \nExercise and debug PCI Express Gen 3 and above, Ethernet, DDR, NVMe, SPI, I2C/I3C, and similar interfaces. \nAnalyze protocol behavior, functional coverage, performance, and corner cases across complex server, storage, and networking systems. \nTranslate system requirements into practical emulation scenarios, tests, checkers, and measurable verification goals. \n Debug and Technical Leadership \nDebug design, environment, transactor, software, and test-code issues across the emulation stack. \nIdentify software and hardware co-simulation limitations and apply effective isolation and debug techniques. \nPartner with cross-functional teams to prioritize a dynamic workload, resolve issues quickly, and drive risks to closure. \nProvide technical leadership, communicate clearly, and operate effectively with minimal guidance and supervision. \nBasic Qualifications \nBachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. \n8-12 years of experience supporting or developing complex SoC or silicon products for server, storage, or networking applications. \nExperience working with logic designers to architect, specify, and verify hardware-software interfaces on complex SoCs. \nWorking knowledge of PCI Express Gen 3 or later, CXL, UALink, Ethernet, DDR, NVMe, SPI, I2C/I3C, or similar communication protocols. \nHigh proficiency in SystemVerilog and hardware verification environments. \nExperience understanding software and hardware co-simulation limitations and applying effective debug methods. \nProgramming and scripting experience in Python, Perl, C, or similar languages. \nProfessional, entrepreneurial, and open-minded approach with a can-do attitude, strong prioritization skills, and a customer-focused mindset. \nAuthorized to work in the United States and available to start immediately. \nPreferred Qualifications \nMaster’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. \nHands-on experience with Palladium, Zebu, Veloce, HAPS, FPGA prototyping, or similar emulation and prototyping technologies. \nExperience developing models for emulation and prototyping and working in non-UVM verification environments. \nExperience building protocol transactors, behavioral models, software drivers, or system-level validation infrastructure. \nBased in the San Jose area or open to relocation; comfortable working fully in person. \nSalary range is $207,000 to $230,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits. \nWe know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.","description_format":"text","description_chars":5261,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":true,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware"],"lifecycle":[{"event":"open","at":"2026-09-09T19:10:04Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 77 · green card filings: 7","filings_12m":77,"filings_prev_12m":50,"green_card_filings_12m":7,"median_offered_wage_usd":168155,"route":null,"cap_exempt":false,"checked_at":"2026-11-08T10:45:15+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":54}],"liveness":{"score":46,"band":"ok","label":"Likely open","p_open":1,"p_active":0.617,"p_room":0.75,"age_days":59,"expected_fill_days":77,"reasons":["conf:1","stale_co","velocity","win:late","comp:brand"],"computed_at":"2026-11-08T05:47:12Z"},"pay":null,"html_url":"https://alion.io/job/astera-labs-principal-emulation-engineer-3","json_url":"https://alion.io/job/astera-labs-principal-emulation-engineer-3.json","meta":{"generated_at":"2026-11-08T17:44:15Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":37195,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-09T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":178069},"rest":"https://alion.io/mcp/rest/get_company?id=178069"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fastera-labs-principal-emulation-engineer-3"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fastera-labs-principal-emulation-engineer-3"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fastera-labs-principal-emulation-engineer-3"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/astera-labs-principal-emulation-engineer-3\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fastera-labs-principal-emulation-engineer-3"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":577922}},{"tool":"search_jobs","arguments":{"company":"asteralabs.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":577922},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}