{"id":1508615,"url":"https://alion.io/job/astera-labs-principal-logic-design-engineer","title":"Principal Logic Design Engineer","company":{"id":178069,"name":"Astera Labs","domain":"asteralabs.com","url":"https://alion.io/company/astera-labs-2","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":82,"open_postings":56,"ghost_share":0,"stale_share":0.518,"repost_share":0,"time_to_fill_p50_days":81,"computed_at":"2026-10-08T05:49:30Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":32000,"max_usd":76000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":566},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"NVLink","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-30T06:27:58Z","employer_posted_date":"2026-09-30","last_verified_at":"2026-10-09T03:23:56Z","board_verified":true,"closed_at":null,"days_open":8,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":8},"description":"Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.\nPrincipal Logic Design Engineer \nExperience - 10+ years \nJob Summary \nWe are seeking a Principal Logic Design Engineer with deep expertise in micro-architecture and RTL design to lead the development of complex IPs/subsystems. The candidate will provide technical ownership across architecture, microarchitecture, RTL implementation, integration, and silicon bring-up. \nKey Responsibilities \nLead RTL/microarchitecture development for complex connectivity IP/subsystems. \nTranslate specifications and system requirements into robust hardware architecture. \nDesign high-performance and scalable logic for controllers/subsystems. \nWork across connectivity IP / subsystem layers including Transaction, Data Link, and Physical interface integration as applicable to the role. \nDevelop and review RTL using SystemVerilog/Verilog. \nDevelop robust mechanisms for flow control, ordering, buffering, arbitration, error handling, and reliability. \nDrive performance, latency, area, and power optimization. \nCollaborate with verification teams to develop verification strategies and debug complex failures. \nWork with SoC integration and physical design teams to ensure successful implementation. \nLead technical reviews and mentor senior engineers. \nSupport post-silicon debug and root-cause analysis. \nRequired Skills \nExtensive experience in complex connectivityIPs such as PCIE, UALink, Ethernet,CXL,UCIe. \nStrong RTL design experience using SystemVerilog/Verilog. \nDeep knowledge of PCIe architecture and protocol. \nStrong understanding of high-speed data paths, FIFOs, arbitration, flow control, and error handling. \nExperience with simulation, lint, CDC, synthesis, and timing considerations. \nStrong debugging and problem-solving skills. \nPreferred \nExperience of working in switching silicon. \nExperience of working on entire cycle from concept to silicon production. \nWe know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with 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