{"id":462282,"url":"https://alion.io/job/astera-labs-principal-physical-design-engineer-methodology","title":"Principal CAD Methodology Engineer, Physical Design","company":{"id":178069,"name":"Astera Labs","domain":"asteralabs.com","url":"https://alion.io/company/astera-labs-2","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":82,"open_postings":50,"ghost_share":0,"stale_share":0.52,"repost_share":0,"time_to_fill_p50_days":78,"computed_at":"2026-11-04T06:34:25Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":185000,"max":240000,"currency":"USD","period":"year","gross":null,"usd_annual":240000},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Innovus","optional":false},{"name":"Cadence Pegasus","optional":false},{"name":"NVLink","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys PrimeTime","optional":false},{"name":"Synopsys StarRC","optional":false},{"name":"AI Agents","optional":true},{"name":"CI/CD","optional":true}],"status":"live","first_seen_at":"2026-07-22T18:58:19Z","employer_posted_date":"2026-10-29","last_verified_at":"2026-11-04T14:25:51Z","board_verified":true,"closed_at":null,"days_open":104,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":104},"description":"Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.\nRole Overview \nAs a Principal Physical Design Engineer, you will define, develop, and maintain the reusable physical design flows and automation infrastructure that the entire PD team relies on. You will build the RTL-to-GDSII flow, integrate and qualify tools from multiple vendors (Cadence and Synopsys), and continuously improve PPA and schedule predictability across all programs. You are the force multiplier scaling the team's capabilities and enabling faster, better tapeouts. This role is fully on-site at our San Jose, CA location. \nKey Responsibilities:\n Flow & Methodology OwnershipDefine, develop, and maintain reusable physical design flows spanning synthesis, place-and-route, extraction, STA, and EMIR\nOwn the end-to-end RTL-to-GDSII flow infrastructure across multi-vendor toolchains (Cadence Innovus, Tempus, Voltus, Pegasus; Synopsys Fusion Compiler, ICC2, PrimeTime, StarRC)\nEvaluate and qualify new tool features, foundry enablement kits, and flow enhancements to continuously improve PPA and schedule predictability\nIntegrate and maintain DRC/LVS/extraction runsets and ensure consistency with foundry requirements\n\nAutomation & ScaleBuild and enhance automation scripts and infrastructure to manage large-scale multi-corner/multi-mode STA and EMIR runs with efficient partitioning and resource usage\nDevelop QoR optimization frameworks and tracking methodologies to measure and improve design quality across programs\nPartner with IT and compute infrastructure teams to optimize job scheduling, storage, and compute resource utilization\n\nStandards, Quality & EnablementEstablish best practices, runset standards, and quality checks that scale across multiple concurrent tapeout programs\nSupport physical design engineers with flow issues, tool configurations, and methodology guidance\nDrive adoption of flow improvements across the team, including training and documentation\n\nBasic Qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Masters Preferred. \n8+ years of experience in physical design methodology, CAD, or flow development for complex SoCs at advanced nodes (7nm and below) \nStrong knowledge of synthesis, place-and-route, extraction, STA, and equivalence checking flows \nExperience with both Cadence (Innovus, Tempus, Voltus, Pegasus) and Synopsys (Fusion Compiler, PrimeTime, StarRC, ICC2) toolchains \nExpert-level scripting ability in Python, Tcl, and/or Perl for flow development and automation \nExperience building and maintaining multi-corner/multi-mode analysis infrastructure \nUnderstanding of foundry design rules, technology files, and enablement kit integration \nAbility to work independently with strong prioritization and a results-driven mindset \nPreferred Qualifications:\nKnowledge of agentic AI solutions for EDA automation \nExperience with CI/CD integration for physical design flows \nFamiliarity with compute farm management and job scheduling optimization \nKnowledge of advanced packaging or multi-die integration flows \nThe base salary range is $185,000 to $240,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives, and benefits. \nWe know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.","description_format":"text","description_chars":4278,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware"],"lifecycle":[{"event":"open","at":"2026-09-06T11:26:14Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 77 · green card filings: 7","filings_12m":77,"filings_prev_12m":50,"green_card_filings_12m":7,"median_offered_wage_usd":168155,"route":null,"cap_exempt":false,"checked_at":"2026-10-29T16:27:21+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":23,"band":"cold","label":"Long shot","p_open":1,"p_active":0.528,"p_room":0.44,"age_days":104,"expected_fill_days":78,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-11-04T06:34:25Z"},"pay":{"stated_usd_annual":240000,"is_top_pay":true},"html_url":"https://alion.io/job/astera-labs-principal-physical-design-engineer-methodology","json_url":"https://alion.io/job/astera-labs-principal-physical-design-engineer-methodology.json","meta":{"generated_at":"2026-11-04T17:38:42Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27053,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-05T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":178069},"rest":"https://alion.io/mcp/rest/get_company?id=178069"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fastera-labs-principal-physical-design-engineer-methodology"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fastera-labs-principal-physical-design-engineer-methodology"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fastera-labs-principal-physical-design-engineer-methodology"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/astera-labs-principal-physical-design-engineer-methodology\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fastera-labs-principal-physical-design-engineer-methodology"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":462282}},{"tool":"search_jobs","arguments":{"company":"asteralabs.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":462282},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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