{"id":958994,"url":"https://alion.io/job/astera-labs-senior-system-validation-engineer","title":"Senior System Validation Engineer","company":{"id":178069,"name":"Astera Labs","domain":"asteralabs.com","url":"https://alion.io/company/astera-labs-2","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":81,"open_postings":48,"ghost_share":0,"stale_share":0.563,"repost_share":0,"time_to_fill_p50_days":77,"computed_at":"2026-11-11T05:49:22Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Tel Aviv, Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":114000,"max_usd":259000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1936},"experience_years_min":6,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"NVLink","optional":false},{"name":"Python","optional":false},{"name":"Git","optional":true},{"name":"Linux","optional":true}],"status":"live","first_seen_at":"2026-09-16T07:50:31Z","employer_posted_date":"2026-10-17","last_verified_at":"2026-11-12T00:14:11Z","board_verified":true,"closed_at":null,"days_open":56,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":56},"description":"Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.\nSenior System Validation Engineer\nAstera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ technologies with the company’s COSMOS software suite to enable scalable, high-performance AI infrastructure. Discover more at www.asteralabs.com.\nOverview:\nAstera Labs is seeking a motivated Senior System Validation Engineer to join our growing post-silicon validation team in Israel and support next-generation connectivity products for AI and data-center applications.\nIn this role, you will perform system-level post-silicon validation, characterization, and debug across silicon, hardware, firmware, and software. You will support silicon bring-up and PVT/corner testing, develop and execute functional and system validation tests, analyze results, and work with cross-functional teams to identify and resolve complex system issues.\nThis is a highly hands-on lab position. The primary location is Haifa, with temporary support at the Ramat Gan lab as needed.\nKey Responsibilities:\nDevelop and execute post-silicon functional and system validation from silicon bring-up through production readiness.\n\nRun PVT, silicon corner, stress, characterization, and qualification testing across a wide range of operating conditions.\n\nDevelop validation tests to verify functionality, performance, stability, power, and operating margins.\n\nDebug issues across silicon, hardware, firmware, drivers, and system software.\n\nValidate high-speed interfaces such as PCIe, CXL, Ethernet/SerDes, and DDR, as well as common system interfaces.\n\nDevelop Python scripts and automation to improve validation coverage, regression, and test efficiency.\n\nAnalyze validation data, identify issues and trends, and drive problems to root cause and closure.\n\nWork closely with hardware, architecture, firmware, software, design, and DV teams to investigate and resolve issues.\n\nSupport the transition of new silicon from initial bring-up to a qualified, production-ready product.\n\nOperate system platforms and laboratory equipment to support validation and debug.\n\nDocument test results, issues, root cause, and recommendations and communicate findings clearly.\n\nBasic Qualifications:\nB.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n6+ years of experience in post-silicon, system, hardware, or product validation.\n\nHands-on experience with SoC/silicon bring-up, functional validation, and system-level debug.\n\nExperience developing and executing validation plans, test cases, and characterization experiments.\n\nStrong Python scripting and test automation skills.\n\nStrong hardware debugging, analytical, and problem-solving skills with the ability to work independently.\n\nExperience debugging issues across hardware, firmware, and software.\n\nExperience validating high-speed interfaces such as PCIe, Ethernet, SerDes, CXL, or DDR.\n\nHands-on experience working in a hardware or system validation laboratory.\n\nStrong communication and cross-functional collaboration skills.\n\nPreferred Qualifications:\nExperience with PVT validation, silicon corner testing, characterization, qualification, and margin analysis.\n\nExperience with server, storage, networking, or AI infrastructure products.\n\nFamiliarity with PCIe/CXL architecture and high-speed SerDes technologies.\n\nExperience with oscilloscopes, BERTs, protocol analyzers, traffic generators, or similar lab equipment.\n\nWorking knowledge of Python, firmware, Linux, and system-level software debugging.\n\nExperience developing automated validation and regression environments.\n\nFamiliarity with Git and software development practices.\n\nExperience with pre-silicon validation, emulation, or hardware prototyping.\n\nExperience with system performance, throughput, latency, power, and stability testing.\n\nWe know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.","description_format":"text","description_chars":5136,"description_truncated":false,"requirements":{"experience_years_min":6,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware"],"lifecycle":[{"event":"open","at":"2026-09-16T08:08:50Z"}],"visa":[],"liveness":{"score":47,"band":"ok","label":"Likely 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