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Location
In office (Suzhou)
Seniority
Senior
Employment
Full-Time
Overview
Company
Impact
Profile match
Bosch is a leading global supplier of technology and services, operating across mobility solutions, industrial technology, consumer goods, and energy and building technology. Headquartered in Germany, the enterprise is renowned for its innovations in Internet of Things (IoT) software, automotive components, power tools, and household appliances.

Job Description | 职位描述

Responsible for designing and developing high-quality PCB layouts for complex automotive or industrial electronic products, ensuring designs meet stringent electrical performance, signal integrity, mechanical fit, and manufacturability requirements.

负责为复杂的汽车电子产品设计和开发高质量的PCB,确保设计满足严格的电气性能,信号完整性,机械装配及可制造性要求。

Act as a key contributor to the product development lifecycle, collaborating closely with hardware, mechanical, and manufacturing engineers from concept to mass production.

作为产品开发生命周期的关键贡献者,与硬件、结构及制造工程师密切合作,贯穿从概念到量产的全过程。

Job Responsibilities | 工作职责

PCB Layout Design & Realization | PCB布局设计与实现

  • Perform component placement and routing for multi-layer, high-density PCBs, considering constraints from electrical, mechanical, and thermal aspects.

    执行多层、高密度 PCB 的元器件布局和布线,综合考虑电气、结构和散热等限制因素。

  • Generate, verify, and release complete PCB manufacturing and assembly data packages (e.g., Gerber/ODB++, drill files, placement files, assembly drawings).

    生成、验证并发布全套 PCB 制造和装配数据包(如 Gerber/ODB++、钻孔文件、贴片坐标文件、装配图等)。

  • Collaborate with Mechanical Engineers to ensure proper fit and clearance within the product enclosure.

    与结构工程师合作,确保 PCB 与产品外壳有正确的配合与间隙。

Signal Integrity, Power Integrity & EMC | 信号完整性、电源完整性及电磁兼容

  • Implement high-speed design rules for interfaces such as DDR, PCIe, Ethernet, SerDes, ensuring signal integrity.

    为 DDR、PCIe、以太网、SerDes 等高速接口执行设计规则,确保信号完整性。

  • Manage impedance control, stack-up design, and routing constraints for critical signals.

    对关键信号进行阻抗控制、叠层设计和布线约束管理。

  • Optimize power distribution networks (PDN) to meet power integrity requirements.

    优化配电网络(PDN),以满足电源完整性要求。

  • Apply layout techniques to mitigate EMI/EMC issues.

    应用布局技术以减少 EMI/EMC(电磁干扰/电磁兼容)问题。

Design for Manufacturing & Assembly (DFM/DFA) | 可制造性/可装配性设计

  • Proactively apply DFM/DFA principles throughout the layout process to optimize for cost, quality, and yield.

    在整个布局设计流程中,主动应用 DFM/DFA(可制造性/可装配性设计)原则,以优化成本、质量和良率。

  • Interface with PCB fabricators and contract manufacturers to resolve technical queries and ensure manufacturability.

    与 PCB 制造商和合同制造商沟通,解决技术问题,确保设计的可制造性。

  • Participate in design reviews and provide expert feedback on layout-related topics.

    参与设计评审,并就布局相关议题提供专业反馈。

Qualifications | 任职资格

  • Bachelor’s degree or above in Electrical Engineering, Electronics, or a related field.

    本科及以上学历,电气工程、电子信息或相关专业。

  • Proven experience in PCB layout design for complex electronics, preferably in the automotive or industrial sector.

    拥有复杂电子产品的 PCB 布局设计经验,汽车或工业领域者优先。

  • Proficient with at least one major EDA tool (e.g., Cadence Allegro, Zuken, Altium Designer). Experience with Zuken Design Force is preferred.

    掌握至少一种主流 EDA 工具(如 Cadence Allegro, Zuken, Altium Designer),有 Zuken Design Force 经验者优先。

  • Solid understanding of high-speed digital design, signal integrity (SI), power integrity (PI), and EMC/EMI principles.

    理解高速数字设计、信号完整性(SI)、电源完整性(PI)及 EMC/EMI 原理。

  • Familiar with PCB fabrication, assembly processes, and IPC standards.

    熟悉 PCB 制造、装配工艺流程以及 IPC 标准。

  • Strong cross-functional communication skills and the ability to work effectively in a team environment.

    具备优秀的跨职能沟通能力和团队协作精神。

  • Highly self-motivated with a strong sense of initiative and exceptional self-learning capabilities to keep pace with fast-evolving technologies.

    具有极强的主观能动性,责任心和出色的自学能力,能够主动追踪并快速掌握迭代的新技术。

  • Good English listening, speaking, reading, and writing skills.

    良好的英语听说读写能力。

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