{"id":2642441,"url":"https://alion.io/job/broadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization","title":"Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization","company":{"id":95,"name":"Broadcom","domain":"broadcom.com","url":"https://alion.io/company/broadcom","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":92,"ghost_share":0.011,"stale_share":0.576,"repost_share":0.011,"time_to_fill_p50_days":32,"computed_at":"2026-10-16T05:45:00Z"}},"role":"AI/ML","role_family":"AI/ML","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Austin, United States","San Jose, United States","Irvine, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":150800,"max":241200,"currency":"USD","period":"year","gross":null,"usd_annual":241200},"salary_estimate":null,"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Agentic Workflows","optional":false},{"name":"AI Agents","optional":false},{"name":"Docker","optional":false},{"name":"Kubernetes","optional":false},{"name":"LangGraph","optional":false},{"name":"LLM","optional":false},{"name":"LLM Guardrails","optional":false},{"name":"Model Context Protocol","optional":false},{"name":"Multi-Agent Systems","optional":false},{"name":"Python","optional":false},{"name":"RAG","optional":false},{"name":"Rest API","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Tool Use","optional":false},{"name":"UVM","optional":false},{"name":"LangChain","optional":true}],"status":"live","first_seen_at":"2026-10-14T00:00:00Z","employer_posted_date":"2026-10-14","last_verified_at":"2026-10-16T03:30:29Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Please Note:\n1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)\n2. If you already have a Candidate Account, please Sign-In before you apply.\nJob Description:\nInfrastructure AI/ML Engineer for Memory Design, Characterization,\nand Yield Optimization\nJob Description\nThe Central Engineering Group is seeking an energetic, visionary, and passionate Infrastructure AI/ ML Engineer to lead the Agentic AI Infrastructure development workflow for memory design, characterization, and yield optimization.\nIn this role, you will collaborate with memory designers and DFT experts to build Agentic AI workflows that drive the development of state-of-the-art embedded memories optimized for PPA, DFT, and yield.\nMinimum Education & Experience Qualifications\nExperience: 15+ years of progressive, relevant experience in Memory design, DFT, Silicon Yield Analysis, software architecture and AI systems engineering.\nEducation: Master’s degree or Ph.D. in Electrical Engineering or Computer Engineering.\nKey Job Responsibilities\nConceptualize, architect, deploy, and scale robust, distributed multi-agent AI frameworks tailored to transform intricate memory design workflows optimized for performance, power, area, and yield\nOrchestrate long-horizon, autonomous agent executions capable of managing multi-step reasoning, task decomposition, and decision-making across all phases of memory design development, silicon bring-up, and yield analysis\nSeamlessly integrate Large Language Model (LLM)-driven agent pipelines with core Electronic Design Automation (EDA) suites, custom in-house software tools, and enterprise data repositories.\nAI-Driven Debug: Develop and deploy ML models to automate the classification of scan failures (Chain, Stuck-at, Transition) and correlate them with design-for-test (DFT) structures.\nPredictive Yield Modeling: Integrate high-dimensional data-including Fab process parameters, PCM (Process Control Monitoring), and E-test data-to predict yield excursions before they hit the assembly line.\nPartner collaboratively with Memory Design Leads, EDA Tool Specialists, and Infrastructure Engineers to distill complex, domain-specific hardware engineering methodologies into modular, goal-driven agentic workflows.\nAlign AI workflow capabilities directly with organizational efficiency targets and technical milestones across the Central Engineering Group.\nRequired Skillset & Technical Competencies\nMemory Design, Characterization and Yield Analysis:\nExperience designing and characterizing embedded memory in advanced technology process nodes\nExperience in compute-in-memory design and architecture\nAI Engineering & Multi-Agent Expertise:\nExperience architecting production-grade LLM applications: multi-agent orchestration,\nfunction-calling/tool-use, and retrieval-augmented generation (RAG).\nExperience integrating agentic systems with enterprise tools, services, and knowledge sources - including building and consuming Model Context Protocol (MCP) servers, and packaging reusable agent capabilities (e.g., Agent Skills).\nDeep experience with agent orchestration frameworks such as LangGraph.\nSemiconductor Domain Knowledge & EDA Tooling:\nFundamental grasp of chip design methodologies, IP block development lifecycles, and verification environments.\nHands-on familiarity with industry-standard EDA tooling and frameworks\nfrom Synopsys, Cadence, and Siemens EDA, alongside System Verilog & UVM verification environments.\nSoftware Engineering & Infrastructure Mastery:\nHigh proficiency in core programming languages and system design concepts, specifically Python and TCL.\nExpertise in microservices architecture, REST APIs, Docker, Kubernetes, Sandboxing, and config-driven workflow orchestration engine design.\nAI System Verification & Data Engineering:\nProven experience establishing evaluation metrics, testing benchmarks, and safety guardrails for non-deterministic AI systems in high-stakes environments.\nTechnical depth in Vector Databases, and cloud-native containerized orchestration pipelines.\nCompensation and Benefits\nThe annual base salary range for this position is USD 150,800.00 To USD 241,200.00\nAs a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.\nBroadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.\nBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.\nIf you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.","description_format":"text","description_chars":5463,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity","Parental leave"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["RF & Wireless Hardware","Virtualization & Containers","Network Equipment","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-15T19:13:53Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":2,"expected_fill_days":32,"reasons":["conf:2","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":{"stated_usd_annual":241200,"is_top_pay":false},"html_url":"https://alion.io/job/broadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization","json_url":"https://alion.io/job/broadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization.json","meta":{"generated_at":"2026-10-16T06:50:42Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4718,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":95},"rest":"https://alion.io/mcp/rest/get_company?id=95"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fbroadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fbroadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fbroadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/broadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fbroadcom-infrastructure-aiml-engineer-for-memory-design-characterization-and-yield-optimization"}]}