{"id":1055226,"url":"https://alion.io/job/broadcom-memory-layout-design-engineer-4","title":"Memory Layout Design Engineer","company":{"id":95,"name":"Broadcom","domain":"broadcom.com","url":"https://alion.io/company/broadcom","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":93,"ghost_share":0.011,"stale_share":0.548,"repost_share":0.011,"time_to_fill_p50_days":31,"computed_at":"2026-10-07T05:47:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":16500,"max_usd":39000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":640},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-09-09T00:00:00Z","employer_posted_date":"2026-09-09","last_verified_at":"2026-10-07T23:57:30Z","board_verified":true,"closed_at":null,"days_open":29,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":29},"description":"Please Note:\n1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)\n2. If you already have a Candidate Account, please Sign-In before you apply.\nJob Description:\nJob Requirements:\n- Minimum 3 years of experience with strong layout knowledge\n- Bachelor's degree required.\n- Proficiency in using Cadence tools (virtuotso layout, layotu XL, Cadence schematic capture, and verification tools - CALIBRE & Hercules).\n- Strong layout knowledge in submicron processes (e.g. 7nm, 5nm, 3nm, 2nm).\n- Experience in digital layout (Standard cell, Memory, I/O); analog layout experience is a plus.\nJob Description:\n- Understand and apply layout guidelines, new process rules, and technical requirements for good quality layout.\n- Manage scheduling, timelines, and layout floor-planning.\n- Responsible for start to end deliverables with quality within the planned schedule.\n- Adapt quickly to new methodologies, remain open to new ideas, and communicate effectively with the SOC/library team.\nSkill Set (Memory):\n- Strong experience in Memory layout design and physical verification (LVS, DRC, ERC, Antenna, ElectroMigration) in CMOS processes.\n- Experience with Cadence Layout tools (VIRTUOSO XL, VXL, or EXL) and CALIBRE verification tools.\n- Proficiency in floor-planning, hierarchy layout, and chip integration.\n- Understanding of memory architecture, RC requirement, ability to plan signal and power, based on the layout guidelines\n- Knowledge of AI, automation in layout, Script Programming and SKILL Programming is a plus.\n- Ability to lead, train junior engineers, and manage projects effectively.\n- Good knowledge of memory layout topology; experience with memory compilers is a plus.\n- Ability to lead new technology reviews to document layout methodologies, flows, and guidelines.\n- Self-reliant with the ability to work both independently and collaboratively.\nBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. 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