{"id":3553602,"url":"https://alion.io/job/broadcom-physical-design-engineer-8","title":"Physical Design Engineer","company":{"id":95,"name":"Broadcom","domain":"broadcom.com","url":"https://alion.io/company/broadcom","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":65,"ghost_share":0.015,"stale_share":0.538,"repost_share":0.015,"time_to_fill_p50_days":35,"computed_at":"2026-11-05T05:54:30Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":82500,"max":132000,"currency":"USD","period":"year","gross":null,"usd_annual":132000},"salary_estimate":null,"experience_years_min":2,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Cadence Innovus","optional":false},{"name":"Python","optional":false},{"name":"Ruby","optional":false},{"name":"Synopsys IC Compiler II","optional":false},{"name":"Synopsys PrimeTime","optional":false}],"status":"live","first_seen_at":"2026-10-30T23:47:32Z","employer_posted_date":"2026-10-30","last_verified_at":"2026-11-05T07:03:44Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"Please Note:\n1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)\n2. If you already have a Candidate Account, please Sign-In before you apply.\nJob Description:\nPhysical Design Engineer (New College Grad) - ASIC Products Division (APD)\nLocation: San Jose, CA\nPosition Type: Full-Time\nWho We Are - Physical Design Team in APD\nBroadcom’s ASIC Products Division (APD) is the global leader in custom high-performance silicon solutions. We partner with the world’s most innovative technology companies-spanning hyper-scale cloud providers, AI pioneers, and tier-1 networking infrastructure leaders-to co-design and manufacture complex, custom ASICs that power the modern digital backbone.\nThe Physical Design team within APD is the world-class execution engine behind the industry's most advanced custom silicon. We push the limits of silicon technology by combining deep architectural expertise, advanced IP, cutting-edge physical design methodologies in 3nm/2nm/A14 nodes, and advanced 2.5D/3D chiplet integration to solve the most demanding compute and bandwidth challenges.We transform ultra-complex architectures into fully realized, high-yielding, first-pass silicon success.\nWhat Defines Our Physical Design Team\n Pioneering First-Pass Silicon in 3nm/2nm: Our team consistently pushes the boundary of physics, taking the largest and most complex die sizes from floorplan to tapeout on leading-edge foundry nodes (N7, N5, N3, and N2).\n Record-Breaking Scale & Complexity: We regularly execute full-chip physical implementation for ultra-large-scale ASICs exceeding tens of billions of transistors, multi-gigahertz clock frequencies, and dense multi-die 2.5D/3D integration (CoWoS, HBM3/4, chiplet architectures).\n Methodology & Flow Leadership: We develop and maintain cutting-edge in-house (AI Driven) automation and methodology across different EDA tools, setting the benchmark for signoff quality and turn-around-time (TAT).\nAbout the Role\nBroadcom’s ASIC Products Division (APD) is looking for a motivated Physical Design Engineer (NCG) to join our Physical Design team. In this role, you will work alongside experienced engineers in executing the implementation tasks for next-generation high-performance networking, AI/ML accelerators, and custom cloud ASICs. In this role, you will gain hands-on experience in complex block-level floorplanning, synthesis, Place and Route (P&R), clock tree synthesis (CTS), timing closure, and signoff across cutting-edge deep sub-micron nodes (N5/N3/N2/A14).\nKey Responsibilities\nParticipate in block-level floorplanning, and run placement and route (P&R) flows using industry-standard EDA tools.\nPerform Static Timing Analysis (STA), debug timing paths, and execute ECOs for timing closure.\nRun Physical Verification checks (DRC, LVS, ERC, Antenna) and resolve signoff violations.\nAnalyze IR drop and electromigration (EM) to ensure power grid integrity.\nDevelop and maintain automated scripts (TCL, Python, Ruby) to enhance flow efficiency and productivity\nBasic Qualifications\n Education: Bachelor's Degree in Electrical Engineering, Computer Engineering + 2yrs of experience or Master’s degree in Electrical Engineering, Computer Engineering (Graduation date within the past 12 months).\n Solid understanding of digital CMOS logic design, standard cell libraries, and semiconductor fundamentals.\nFamiliarity with static timing analysis (STA) concepts, clocking, and setup/hold timing.\nHands-on coursework, lab experience, or academic projects using EDA design tools (Cadence Innovus/Tempus, Synopsys IC Compiler II/PrimeTime, or Siemens tools).\nProficient in scripting languages such as TCL, Python, Ruby, or Bash.\nPreferred Qualifications\nPrior internship or research experience in ASIC physical design, synthesis, or physical verification.\nBasic understanding of Design for Testability (DFT), low-power intent (UPF/CPF), and FinFET technologies.\nExcellent problem-solving, debugging, and analytical skills.\nWork Authorization / Eligibility Requirements\nLegal authorization to work in the U.S. is required\nCompensation and Benefits\nThe annual base salary range for this position is USD 82,500.00 To USD 132,000.00\nAs a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.\nBroadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.\nBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.\nIf you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.","description_format":"text","description_chars":5494,"description_truncated":false,"requirements":{"experience_years_min":2,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity","Parental leave"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["RF & Wireless Hardware","Virtualization & Containers","Network Equipment","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-30T23:47:32Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":5,"expected_fill_days":35,"reasons":["conf:12","stale_co","velocity","win:early","comp:junior,brand"],"computed_at":"2026-11-05T05:54:30Z"},"pay":{"stated_usd_annual":132000,"is_top_pay":true},"html_url":"https://alion.io/job/broadcom-physical-design-engineer-8","json_url":"https://alion.io/job/broadcom-physical-design-engineer-8.json","meta":{"generated_at":"2026-11-05T07:35:27Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":9593,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-06T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":95},"rest":"https://alion.io/mcp/rest/get_company?id=95"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fbroadcom-physical-design-engineer-8"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fbroadcom-physical-design-engineer-8"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fbroadcom-physical-design-engineer-8"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/broadcom-physical-design-engineer-8\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fbroadcom-physical-design-engineer-8"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3553602}},{"tool":"search_jobs","arguments":{"company":"broadcom.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3553602},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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