{"id":3841214,"url":"https://alion.io/job/broadcom-rd-engineer-ic-design-8","title":"R&D Engineer, IC Design","company":{"id":95,"name":"Broadcom","domain":"broadcom.com","url":"https://alion.io/company/broadcom","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":64,"ghost_share":0.016,"stale_share":0.547,"repost_share":0.016,"time_to_fill_p50_days":35,"computed_at":"2026-11-07T05:47:08Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Irvine, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":74000,"max":118800,"currency":"USD","period":"year","gross":null,"usd_annual":118800},"salary_estimate":null,"experience_years_min":2,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"Git","optional":false},{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Windows","optional":false}],"status":"live","first_seen_at":"2026-11-05T22:54:59Z","employer_posted_date":"2026-11-05","last_verified_at":"2026-11-07T06:21:40Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Please Note:\n1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)\n2. If you already have a Candidate Account, please Sign-In before you apply.\nJob Description:\nDuties\nWrite and maintain assertions and DV tests for chip-level and block-level models\nGather design data from circuit designers\nCreate netlists and use AI to create models, including real-number models\nWrite tests to verify the models\nWrite code to automate tasks\nMinimum Qualifications\nBachelor's degree in Computer Science, Electrical Engineering or a related field\nMinimum of 2 years of relevant experience\nWorking knowledge of Verilog/SystemVerilog\nWorking knowledge of the Linux operating system\nFamiliarity with Cadence Virtuoso\nProficiency with Python, Git, JIRA, Windows and the Google Office suites\nPreferred Qualifications\nExperience with real-number modeling\nExperience with AI-assisted development tools\nStrong track record of collaborating with different teams\nSkills\nVerilog/SystemVerilog, real-number modeling, Python, Cadence Virtuoso, cross-team communication and coordination\nCompensation and Benefits\nThe annual base salary range for this position is USD 74,000.00 To USD 118,800.00\nAs a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.\nBroadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.\nBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. 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