{"id":4060357,"url":"https://alion.io/job/broadcom-staff-engineer-4","title":"Staff Engineer","company":{"id":95,"name":"Broadcom","domain":"broadcom.com","url":"https://alion.io/company/broadcom","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":59,"ghost_share":0.034,"stale_share":0.525,"repost_share":0.034,"time_to_fill_p50_days":37,"computed_at":"2026-11-11T05:49:22Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Tessent","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-11-10T00:00:00Z","employer_posted_date":"2026-11-10","last_verified_at":"2026-11-11T08:14:47Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Please Note:\n1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)\n2. If you already have a Candidate Account, please Sign-In before you apply.\nJob Description:\nJob Description: \nBroadcom's Central Engineering Group (CEG) is looking for an experienced, energetic and self-driven professional to join our team as a senior modeling engineer for the development and improvement of functional, timing, power, and DFT simulation models. This role will focus on authoring, debugging, and optimizing memory IP (SRAM, RF, CAM, ROM, etc.) EDA models used in ASIC-like design flows by chip teams throughout the company. This is a senior position with the expectation that the candidate can lead projects, proactively navigate complex technical issues, be able to work autonomously, and collaboratively participate in the establishment of strategic objectives.\nThe candidate must have abilities to prioritize well, communicate clearly and concisely, deliver high quality solutions on-time, and possess excellent problem solving skills. This person will be expected to work across multiple facets of projects, have experience with ASIC development, and juggle multiple responsibilities at the same time exhibit excellent multitasking, context switching, and time management skills.\nResponsibilities: \nCandidate will\nLead memory modeling and compiler development projects working closely with design teams in an environment highly charged with technical complexities and dynamic schedule challenges. \nBe expected to demonstrate skills and abilities to lead and drive results & improvements, multitask and deliver high quality solutions in a timely fashion.\nWrite model templates for integration into memory compilers to generate models used in DFT/CAD tools used in ASIC development flows.\nParticipate in forums for model development, improvement and reviews, and will serve as a knowledge resource for peers, colleagues, and subordinates in the organization.\nBe expected to communicate well, document well, prioritize tasks and handle the multiple facets of model development projects independently to meet the business goals and commitments.\nWork to improve memory models and model generation flows for better performance, user experience and quality.\nWork directly with IP design teams, compiler teams and tool vendors globally to help resolve model related issues, and find timely solutions.\nRespond to library support requests and address tickets on model issues from product teams across Broadcom. \nQualifications:\nThe minimum engineering experience required is typically a BS degree in EE/CS/CE with programming/coding experience with 8+ years of industry experience, or an MS degree with 6+ or Ph.D. degree in EE/CS with 3+ years of industry experience.\nHave at least 3 years experience using Linux systems; possess excellent knowledge of Linux commands, file systems, and job execution. \nStrong preference for 5+ years of experience in Verilog modeling skills\nStatic & Dynamic timing analysis knowledge.\nExperience with chip design tools and design flows, such as:DFT: Tessent, LogicVision, Modus, manufacturing test flows: at-speed scan test, Logic BIST, Memory BIST\nSynthesis: Design Compiler, Genus.\nSimulation: VCS, Questa, Verilog, waveform viewers, and simulation debug.\nUVM verification tetsbench and methodology development\n\nConversant with Verilog/RTL/Behavioral/Timing/Power/DFT/ATPG/Synthesizable model development for SRAMs/RF/CAM/ROM, etc. memories. \nExperience in writing directed test bench in verilog for model verification.\nKnowledge and experience using simulators - NC, VCS, ModelSim, ESPCV is a must.\nFamiliarity with memory model verification/QC flow is required.\nScripting & flow automation, Perl, Python, Tcl, Shell programming skills are required. \nAble to work in agile and dynamic development environments.\nExcellent written and verbal communication skills.\nSkilled multi-tasking abilities and context switching skills are a must.\nStrong analytical, problem solving and quick learning skills are required.\nGood team player, methodical, eye for detail, independent, well organized, and have the ability to remain calm and composed in high pressure situations.\nBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.\nIf you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.","description_format":"text","description_chars":4831,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["RF & Wireless Hardware","Virtualization & Containers","Network Equipment","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-11-11T08:14:47Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":1,"expected_fill_days":37,"reasons":["conf:1","win:early","comp:brand"],"computed_at":"2026-11-11T09:56:24Z"},"pay":null,"html_url":"https://alion.io/job/broadcom-staff-engineer-4","json_url":"https://alion.io/job/broadcom-staff-engineer-4.json","meta":{"generated_at":"2026-11-11T09:56:24Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":16773,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-12T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":95},"rest":"https://alion.io/mcp/rest/get_company?id=95"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fbroadcom-staff-engineer-4"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fbroadcom-staff-engineer-4"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fbroadcom-staff-engineer-4"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/broadcom-staff-engineer-4\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fbroadcom-staff-engineer-4"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4060357}},{"tool":"search_jobs","arguments":{"company":"broadcom.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4060357},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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