{"id":3310102,"url":"https://alion.io/job/cadence-design-systems-design-engineering-architect","title":"Design Engineering Architect","company":{"id":4351,"name":"Cadence Design Systems","domain":"cadence.com","url":"https://alion.io/company/cadence","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":81,"open_postings":110,"ghost_share":0,"stale_share":0.755,"repost_share":0,"time_to_fill_p50_days":57,"computed_at":"2026-11-03T05:54:40Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":34000,"max_usd":73000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":646},"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys HFSS","optional":false},{"name":"Ansys SIwave","optional":false}],"status":"live","first_seen_at":"2026-10-26T00:00:00Z","employer_posted_date":"2026-10-26","last_verified_at":"2026-11-03T11:22:18Z","board_verified":true,"closed_at":null,"days_open":8,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":8},"description":"At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.\nJOb Profile\nThis is a unique opportunity to join the HPP IP R&D Group at Cadence Design Systems. We are looking for a Sr Principal SI/PI Engineer who will be a key contributor to our advanced high speed IP products. This is a hands-on technical position.\nMain Job Tasks and Responsibilities:\nWork on test chip package design SI/PI optimization and verification.\nWork on evaluation board design optimization for best SI/PI performance.\nProvide extracted and measured channel models for chip designers in the R&D team.\nHelp with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.\nReview customer package and board designs and simulation results. Help with providing feedback to customers to ensure best possible performance of our IP in their ASIC.\nWork on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.\nHelp with SI/PI related debug of test chips or customer ASICs in the lab. \nPosition Requirements:\nM.S. or Ph.D. Electrical Engineering (or similar degree)\n15+ years of experience preferably working with high speed SerDes and PHYs\nGood understanding of high speed SerDes architecture\nHands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.\nFluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave\nExperience with IBIS-AMI model simulations\nExperience with simulation result to lab measurement correlation\nGood understanding of PCB and FCBGA design rules and requirements\nStrong debugging and problem-solving skills\nExcellent communication and presentation skills to effectively communicate with both customers and internal stake holders\nWe’re doing work that matters. Help us solve what others can’t.","description_format":"text","description_chars":1889,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-10-27T03:00:31Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":8,"expected_fill_days":57,"reasons":["conf:0","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-11-03T05:54:40Z"},"pay":null,"html_url":"https://alion.io/job/cadence-design-systems-design-engineering-architect","json_url":"https://alion.io/job/cadence-design-systems-design-engineering-architect.json","meta":{"generated_at":"2026-11-03T13:33:35Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":18825,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-04T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":4351},"rest":"https://alion.io/mcp/rest/get_company?id=4351"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcadence-design-systems-design-engineering-architect"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcadence-design-systems-design-engineering-architect"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcadence-design-systems-design-engineering-architect"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cadence-design-systems-design-engineering-architect\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcadence-design-systems-design-engineering-architect"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3310102}},{"tool":"search_jobs","arguments":{"company":"cadence.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3310102},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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