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Salary
$119k – $221k per year
Location
In office (San Jose)
Seniority
Staff · 5+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Sep 23, 2026. First seen by Alion on Sep 23, 2026. Cadence Design Systems scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an integral member of the HSV Customer Support Team, you will work with our customers and field AE teams and R&D groups to provide technical support for our Palladium, Protium and Virtual Protocol (PDAPP) products. You will enjoy the experience and challenge in working with a broad spectrum of designs and customers.

Responsibilities includes:

  • Taking ownership and quickly drive to resolution product issues reported by field AEs and customers.
  • Debug customer reported failures, produce test cases to replicate failure and log issues with HSV R&D teams.
  • Recommend potential workaround or application level solutions to customers when necessary.
  • Test R&D fixes/patches.
  • Work with customer and internal groups to spec out enhancement requests.
  • Testing new product features for future s/w releases or h/w platform, including participation in internal beta activities.

Position Requirements:

  • Requires a BS-EE/CE (MS-EE/CE preferred) with a minimum of 5 years experience in design and/or verification of complex digital designs, or Applications engineering/technical support role.
  • Strong knowledge of design debug techniques and a strong understanding in logic design.
  • Knowledgeable in verification methodologies for complex EDA environments.
  • Proficiency in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quickly.
  • Proficiency in Unix/Linux scripting languages (ksh/bash/csh).
  • Proficiency in PCIe, USB and Ethernet protocol.
  • Proficiency in TBA, SVA, SV coverage, Low Power(UPF). UVM experience is a plus.
  • Experience with emulation, Cadence's Palladium product preferred.
  • Excellent communication skills. Must have ability to communicate complex issue to internal teams and customers in a clear and concise manner.
  • Occasional travel may be required to resolve critical customer issues.
  • undefined

The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

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