{"id":2875742,"url":"https://alion.io/job/cadence-design-systems-principal-design-engineer-17","title":"Principal Design Engineer","company":{"id":4351,"name":"Cadence Design Systems","domain":"cadence.com","url":"https://alion.io/company/cadence","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":81,"open_postings":110,"ghost_share":0,"stale_share":0.745,"repost_share":0,"time_to_fill_p50_days":57,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Cork, Ireland"],"countries":["IE"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":111000,"max_usd":253000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":741},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2025-02-24T00:00:00Z","employer_posted_date":"2025-02-24","last_verified_at":"2026-10-22T06:53:03Z","board_verified":false,"closed_at":null,"days_open":607,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":607},"description":"At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.\nCadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.\nCadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.\nAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.\nJob Title:Principal Design Engineer (Memory)\nLocation:Cork\nReports to:Design Engineering Director\nJob Overview:\nThe Cadence Silicon Solutions Group (SSG) developleading edgeIntellectual Property (IP) for a variety of High-Tech Markets. The Cadence IP solutions allow our Customersto tackle IP-to-SoC development in a system context, enabling them to focus on product differentiation and to reduce time to volume.\nThis is an opportunity to join a development team designing state-of-the-artDDR memory controllers to be used in a wide range of applications including Datacenter, Edge computing, Automotive, and AI. Cadence is a leading provider of IP solutions for the biggest names in the technology industry.\nThe Principal Design Engineer will be based in Cork, as part of an experienced Controller IP Team with long established Controller development sites in Europe, USand India.\nJobResponsibilities:\nArchitect solutions for the latest DDR controller features and customer requirements.\n\nDesign RTL in a highly configurable and automated environment.\n\nWork in small project teams.\n\nWork across disciplines with Design Verification, Support, Delivery, Application Engineers, PHY design team, etc.\n\nUtilize Cadence’s Design Automation flow and IP development tools.\n\nDevelop high speed circuits and low power features.\n\nImprove quality and efficiency and help refine developmentprocess for greater productivity of the team through automation and improved methods.\n\nParticipate in an engineering team to advance our product.\n\nJob Qualifications:\nDegree in Electrical/ElectronicEngineering, Microelectronics, or a related discipline.\n\n10+ years’ experience in microelectronics/EDA industry.\n\nExperience of Verilog RTL Design essential.\n\nExperience of Metric Driven Verification (MDV) essential.\n\nExperience of Front-end design tools covering LINT, Synthesis, CDC Analysis essential.\n\nExperience of SoC Architecture and Development essential.\n\nExperience of Technical Team leadership essential.\n\nExcellent oral and written English essential.\n\nSelf-motivated with excellent planning, interpersonal, and communication skills.\n\nAdditional Skills/Preferences:\nExperience of AMBA protocols such as CHI, AXI, AHB & APB preferred.\n\nExperience of SystemVerilogfor design preferred.\n\nExperience of Quality processes, such as ISO-9001 & ISO-26262 preferred.\n\nAdditional Information:\nCadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.\nWe’re doing work that matters. Help us solve what others can’t.","description_format":"text","description_chars":3439,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-10-19T21:24:12Z"}],"visa":[],"liveness":{"score":3,"band":"cold","label":"Long shot","p_open":1,"p_active":0.124,"p_room":0.28,"age_days":607,"expected_fill_days":57,"reasons":["conf:47","stale_co","evergreen","wave","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/cadence-design-systems-principal-design-engineer-17","json_url":"https://alion.io/job/cadence-design-systems-principal-design-engineer-17.json","meta":{"generated_at":"2026-10-24T07:11:08Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":10635,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":4351},"rest":"https://alion.io/mcp/rest/get_company?id=4351"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcadence-design-systems-principal-design-engineer-17"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcadence-design-systems-principal-design-engineer-17"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcadence-design-systems-principal-design-engineer-17"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cadence-design-systems-principal-design-engineer-17\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcadence-design-systems-principal-design-engineer-17"}]}