{"id":1034487,"url":"https://alion.io/job/cadence-design-systems-rtl2gds-ic-sr-principal-design-engineer","title":"RTL2GDS IC Sr. Principal Design Engineer","company":{"id":4351,"name":"Cadence Design Systems","domain":"cadence.com","url":"https://alion.io/company/cadence","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":82,"open_postings":115,"ghost_share":0,"stale_share":0.73,"repost_share":0,"time_to_fill_p50_days":57,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Solutions","role_family":"Solutions","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":161000,"max":299000,"currency":"USD","period":"year","gross":null,"usd_annual":299000},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Perl","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Synopsys Fusion Compiler","optional":false}],"status":"live","first_seen_at":"2026-09-08T00:00:00Z","employer_posted_date":"2026-09-23","last_verified_at":"2026-10-25T13:14:13Z","board_verified":true,"closed_at":null,"days_open":48,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":48},"description":"At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.\nJob Description\nThe ideal candidate will be energetic, innovative and enthused with how to help customers, solve their toughest Digital Implementation problems using Cadence technology. Willdrive Pre-sales and Post-sales activities at advanced nodes for Cadence Digital IC products.\n\nKey Responsibilities\nProvide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff\nGuide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules\nConduct technical presentations and product demonstrations\nDrive technicalevaluations/benchmarksto success\nWork closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements\nDrive adoption and proliferation of Cadence tools and technologies\nAmend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows\nCapture best practices and lessons learned from currentevaluations/benchmarksand utilize to improve efficiency and success rate in next engagements \nProvide technical support, when developing business case for process improvement projects.\nProvide mentorship to junior engineers\nJob Requirements\nRequires a BS or MS or PhD in EE with/or 10-12 years industry related experience in design and EDA(Digital Implementation/Signoff)\nUnderstands ASIC Design implementation process and steps\nStrong hands-on experience with Place & Route (Innovus, ICC2, Fusion Compiler)\nExposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler)\nExperience with EDA tools in the IC digital implementation & signoff flows (STA tools)\nStrong STA and SDC debugging abilities are required.\nLow power analysis, Clock design/analysis and hands-on 7/5nm technology node experience a plus.\nAutomation skills using Perl, Tcl and shell scripting essential \nStrong analytical & analysis skills coveringdigital implementation iscritical. \nProven track record and experience working in a fast paced environment \nExcellent customer interaction & presentation skills\n\nThe annual salary range for California is $161,000 to $299,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.\nWe’re doing work that matters. Help us solve what others can’t.","description_format":"text","description_chars":2937,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-09-18T15:41:38Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 368 · green card filings: 176","filings_12m":368,"filings_prev_12m":268,"green_card_filings_12m":176,"median_offered_wage_usd":150882,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":61}],"liveness":{"score":33,"band":"fade","label":"Fading","p_open":1,"p_active":0.557,"p_room":0.6,"age_days":48,"expected_fill_days":57,"reasons":["conf:16","stale_co","velocity","win:late","crowd:brand"],"computed_at":"2026-10-26T05:57:25Z"},"pay":{"stated_usd_annual":299000,"is_top_pay":true},"html_url":"https://alion.io/job/cadence-design-systems-rtl2gds-ic-sr-principal-design-engineer","json_url":"https://alion.io/job/cadence-design-systems-rtl2gds-ic-sr-principal-design-engineer.json","meta":{"generated_at":"2026-10-26T07:39:46Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":10106,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-27T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":4351},"rest":"https://alion.io/mcp/rest/get_company?id=4351"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcadence-design-systems-rtl2gds-ic-sr-principal-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcadence-design-systems-rtl2gds-ic-sr-principal-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcadence-design-systems-rtl2gds-ic-sr-principal-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cadence-design-systems-rtl2gds-ic-sr-principal-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcadence-design-systems-rtl2gds-ic-sr-principal-design-engineer"}]}