{"id":733159,"url":"https://alion.io/job/celerocommunications-dsp-fec-design-engineer","title":"DSP - FEC Design Engineer","company":{"id":668982,"name":"Celero Communications","domain":"celerocommunications.com","url":"https://alion.io/company/celerocommunications","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":80,"open_postings":5,"ghost_share":0,"stale_share":0.8,"repost_share":0,"time_to_fill_p50_days":35,"computed_at":"2026-11-02T06:13:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Ottawa, Canada","Vancouver, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":150000,"max":250000,"currency":"CAD","period":"year","gross":null,"usd_annual":177722},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":true},{"name":"GitHub","optional":true},{"name":"MATLAB","optional":true},{"name":"Python","optional":true},{"name":"Verilog","optional":true},{"name":"VHDL","optional":true}],"status":"live","first_seen_at":"2026-03-17T00:11:37Z","employer_posted_date":"2026-09-29","last_verified_at":"2026-11-02T21:42:22Z","board_verified":true,"closed_at":null,"days_open":230,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":230},"description":"About the Role: \nCelero Communications Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure.\nWe are looking for skilled and motivated engineers to join our team and help us build optical transceivers for next-generation optical modems. The ideal candidate must have a strong theoretical background in coding theory, digital communications, and error correction techniques, with experience developing high-performance forward error correction (FEC) algorithms for high-speed communication systems. Candidates with industry experience are preferred.\nLocations: Ottawa, Ontario, Canada and Vancouver, British Columbia, Canada\nKey Responsibilities\nResearch, develop, and evaluate forward error correction (FEC) schemes for high-speed optical communication systems.\nDesign and optimize soft-decision FEC algorithms suitable for high-throughput optical modem implementations.\nDevelop and evaluate coding schemes such as LDPC, staircase codes, or related high-performance FEC architectures.\nModel and simulate FEC performance in optical communication systems, including interaction with DSP blocks and channel impairments.\nAnalyze performance trade-offs including coding gain, latency, throughput, and implementation complexity.\nDevelop floating-point and fixed-point simulation models for algorithm verification.\nImplement bit-accurate and cycle-accurate models supporting ASIC implementation.\nCollaborate closely with DSP, ASIC, firmware, and verification teams to ensure efficient hardware implementation.\nDocument algorithm design and simulation results.\nPreferred Qualifications\nMaster’s or Ph.D. degree in Electrical Engineering, Mathematics, Computer Engineering, or related field.\nStrong background in coding theory and error correction algorithms.\nExperience with FEC schemes for communication systems, particularly soft-decision FEC.\nFamiliarity with LDPC, staircase codes, product codes, or related modern FEC techniques.\nExperience evaluating coding gain, BER performance, and decoder complexity.\nProgramming experience in C/C++, Python, MATLAB, or similar languages.\nExperience in modeling communication systems.\nFamiliarity with DSP algorithms for communication systems.\nExperience with version control systems, specifically GitHub.\nFamiliarity with hardware implementation considerations and languages such as Verilog or VHDL is a plus.\nTeam player with a mindset focused on the successful delivery of the first product.\nWhy Join Us\nThe chance to play a foundational role at a high-growth semiconductor start-up.\nWork on cutting-edge optical communication technologies powering AI and hyperscale data centers.\nA collaborative, international team culture where ideas and initiative are valued.\nThe opportunity to grow alongside Celero as we scale and shape the future of our industry.\nSalary Range\n$150,000 - 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