{"id":3190530,"url":"https://alion.io/job/celestica-senior-hardware-design-engineer-fpgacpld","title":"Senior Hardware Design Engineer (FPGA/CPLD)","company":{"id":58064,"name":"Celestica","domain":"celestica.com","url":"https://alion.io/company/celestica","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"remote","remote_scope":"stated_countries","remote_scope_basis":"board_field","remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["George Town, Malaysia"],"countries":["MY"],"hiring_countries":["MY"],"hiring_countries_total":1,"salary":null,"salary_estimate":{"min_usd":19500,"max_usd":44000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1936},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"Xilinx Vivado","optional":false},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-14T02:00:00Z","employer_posted_date":"2026-10-14","last_verified_at":"2026-10-29T05:22:47Z","board_verified":true,"closed_at":null,"days_open":15,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":15},"description":"Req ID: 134844\nRemote Position: No\nRegion: Asia\nCountry: Malaysia\nState/Province: Bayan Lepas\nCity: Penang\nGeneral Overview\nFunctional Area: Engineering\nCareer Stream: Design Engineering Hardware\nSAP Short Name: SLE-ENG-DHW\nJob Level: Level 09\nIC/MGR: Individual Contributor\nDirect/Indirect Indicator: Indirect\nSummary\nThe FPGA/CPLD engineer will play a key role in designin g, implementing, and validating\nFPGA/CPLD based solutions for data center server, storage, and switching platforms.\nThe role involves defining system FPGA /CPLD architecture, technical proposal and part selection,\nwriting RTL code, running simulations, FPGA/CPLD schematic and PCB design review a nd validating\ndesigns on hardware. You will be responsible for optimizing designs to meet system requirements\nand working closely with hardware and software engineers to ensure full integration.\nThis position works in a cross functional team with designer s, customers, and project leaders to\nensure robust and high quality product development. The FPGA /CPLD e ngineer will also help\nimprove designs based on feedback from areas such as manufacturing, reliability, and testing.\nDetailed Description\nPerforms tasks such as, but not limited to, the following:\nWork closely with system architecture , hardware designer and software designer to\nunderstand/define the architecture requirements\nCreate the design specification test plans, and reports to ensure design traceability.\nCooperate with hardware engineer on the logic par t schematic design /review etc.\nOn time delivery of the RTL design and module level verifica tion and test case definition\nPerform pre synthesis and post synthesis simulation and validation.\nDrive the entire back end design flow including design constrain ts, floor plan and timing\nanalysis.\nLead debugging and failure analysis efforts during FPGA /CPLD on board validation.\nCollaborate with peers inc luding different function team to ensure the successful delivery\nof high performance systems\nAs a mentor to junior engineers, provide training and technical guidance.\nProvide accurate and timely project schedule estimates , meet project milestone schedule\nJob Requirement:\nBachelors or Masters in Computer Science, Communication and System Engineering,\nElectrical Engineering or related fields\nBSEE with 10 + years o f FPGA/CPLD experience or MSEE with 5 + years of familiar\nwith Xilinx and Intel(Altera)FPGA and Lattice CPLD/FPGA etc.\nIn depth knowledge with Verilog, System Verilog, RTL design, FP GA /CPLD design, and\nFPGA /CPLD design tools ( eg. ISE, Vivado, Quartuse II, Diamond, Modelsim etc.etc.)\nIn depth knowledge with high speed serial protocols such as PCIe/ USB/ Ethernet/DDR/LVDS;\nFamiliar with SPI , eSPI , I2C , UART , LPC , MDIO etc low speed interface\namiliar with UVM constrained random coverage driven concepts, assertion based\nverification and f unctional coverage techniques\nProficient in und erstanding hardware schematics and PCB designs for FPGA/CPLD pinout\nconstraints and on board validation.\nProficient in using oscilloscopes, multi meters , logic analyzers, and various hardware\ndebugging and testing tools.\nExcellent problem solving and hands on debugging skills\nExcellent communications skills and well Eng lish speaking/writing ability\nStrong inter personal skills and ability to understand customer needs, expectations and perspective\nDemonstrated ability to multi task on multiple projects\nAdditional Prefer Requirement:\nIn depth knowledge with data center server, storage, and switching platforms architecture,\nwith expertise in FPGA/CPLD roles inside the system , FPGA/CPLD part selection, and\ntechnical proposal development;\nFamiliar with hardware development processes with extensive experience in hardware\ndesign , bring up, and troubleshooting, proficient in Intel/AMD X86 CPU archi tecture and\npower up sequencing etc.\nIn depth knowledge with secure boot design principles and implementation, providing\nsuitable secure boot solutions for different syst ems;\nProficient in C/C++, with experience in FPGA/CPLD feature software driv er development\nand verification, f amiliar with MicroBlaze, Nios II, or MCU development is a plus.\nProficient in Shell/Python development , customizing scripts based on system requirements\nfor testing purposes.\nKnowledge/Skills/Competencies\nRefer to technical skills below\nPhysical Demands\nDuties of this position are performed in a normal office environment.\nDuties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. \nRepetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.\nOccasional travel may be required.\nTypical Experience\n4 to 6 years in a similar role or industry.\nTypical Education\nBachelor degree or consideration of an equivalent combination of education and experience.\nEducational Requirements may vary by Geography\nNotes\nThis job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.\nCelestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status (including race, religion, national origin, gender, sexual orientation, age, marital status, veteran or disability status or other characteristics protected by law).\nAt Celestica we are committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported. Special arrangements can be made for candidates who need it throughout the hiring process. Please indicate your needs and we will work with you to meet them.\nCOMPANY OVERVIEW:\nCelestica (NYSE, TSX: CLS) enables the world’s best brands. Through our recognized customer-centric approach, we partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges. As a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development - from drawing board to full-scale production and after-market services for products from advanced medical devices, to highly engineered aviation systems, to next-generation hardware platform solutions for the Cloud. Headquartered in Toronto, with talented teams spanning 40+ locations in 13 countries across the Americas, Europe and Asia, we imagine, develop and deliver a better future with our customers.\nCelestica would like to thank all applicants, however, only qualified applicants will be contacted.\nCelestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.","description_format":"text","description_chars":6979,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Malaysia","iso":"MY","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Electronics Manufacturing"],"lifecycle":[{"event":"open","at":"2026-10-24T01:26:30Z"}],"visa":[],"liveness":{"score":58,"band":"ok","label":"Likely open","p_open":1,"p_active":0.772,"p_room":0.75,"age_days":14,"expected_fill_days":18,"reasons":["conf:2","velocity","win:late","comp:brand"],"computed_at":"2026-10-28T05:59:10Z"},"pay":null,"html_url":"https://alion.io/job/celestica-senior-hardware-design-engineer-fpgacpld","json_url":"https://alion.io/job/celestica-senior-hardware-design-engineer-fpgacpld.json","meta":{"generated_at":"2026-10-29T05:42:34Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":8808,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-30T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58064},"rest":"https://alion.io/mcp/rest/get_company?id=58064"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcelestica-senior-hardware-design-engineer-fpgacpld"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcelestica-senior-hardware-design-engineer-fpgacpld"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcelestica-senior-hardware-design-engineer-fpgacpld"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/celestica-senior-hardware-design-engineer-fpgacpld\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcelestica-senior-hardware-design-engineer-fpgacpld"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3190530}},{"tool":"search_jobs","arguments":{"company":"celestica.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3190530},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}