{"id":4042404,"url":"https://alion.io/job/celestica-senior-lead-hardware-dft-testability-engineer-pcba","title":"Senior Lead, Hardware DFT & Testability Engineer (PCBA)","company":{"id":58064,"name":"Celestica","domain":"celestica.com","url":"https://alion.io/company/celestica","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":{"grade":"A","score":98,"open_postings":6,"ghost_share":0,"stale_share":0.167,"repost_share":0.167,"time_to_fill_p50_days":20,"computed_at":"2026-11-10T06:52:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Richardson, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Advantest / Teradyne ATE","optional":false}],"status":"live","first_seen_at":"2026-10-31T02:00:00Z","employer_posted_date":"2026-10-31","last_verified_at":"2026-11-10T22:39:38Z","board_verified":true,"closed_at":null,"days_open":11,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":11},"description":"Req ID: 140254\nRegion: Americas\nCountry: USA\nState/Province: Texas\nCity: Richardson\nSummary\nAt Celestica, we don't just manufacture high-complexity technology, we design, engineer, and optimize the hardware powering the future. As a global leader in design, engineering, and manufacturing services, our teams partner with world-changing brands across cloud infrastructure, aerospace, defense, healthtech, and advanced electronics. Located in Richardson, TX, our site offers a collaborative, fast-paced environment where your technical voice directly impacts the physical products shaping tomorrow's technology landscape.\nCelestica is seeking a Hardware DFT & Testability Engineer (PCBA) to ensure testability and maximum test coverage are embedded into printed circuit board (PCB) hardware designs long before layout freeze. In this role within our DFx Center of Excellence, you will serve as an upstream design gatekeeper. You will perform in-design testability reviews, audit physical test point access for In-Circuit Testing (ICT), configure board-level boundary scan chains, and model structural and functional test coverage against key manufacturing targets to drive high-yield, debug-ready releases.\n(Note: Candidates with strong hands-on backgrounds in structural In-Circuit Testing (ICT) fixture development-such as Teradyne, Keysight 3070, or flying probes-who wish to transition into upstream pre-layout design gatekeeping are highly encouraged to apply.)\nDetailed Description\nRole Focus: Board-Level Schematic & Layout Gatekeeping | Structural ICT Probe Access | IEEE 1149.1 Boundary Scan | MTRS Coverage (Note: This is strictly a PCBA hardware role, NOT an ASIC/Silicon, RTL, or Software QA role).\nDetailed Description\nPre-Freeze Audits: Review electrical schematics and high-density PCB CAD layouts against the core DFT rule set prior to layout freeze. Enforce physical requirements such as test pad pitch, pogo-pin/probe-to-component clearances, and keep-out zones.\nCoverage Modeling: Model structural and functional coverage against the Manufacturing Test Requirements Specification (MTRS) and quantify coverage gaps before manufacturing begins.\nFinding Disposition: Partner directly with hardware design, PCB layout, and software teams to resolve testability issues through test point additions, boundary scan chain corrections, or agreed-upon design alternatives.\nValidation & Verification: Verify actual achieved coverage on the first physical test fixture (e.g., ICT, flying probe) and document discrepancies against pre-layout claims.\nSite Support: Assist with functional test definition and early build debug in collaboration with Technical Region Leads (TRLs) and local test SMEs on the manufacturing floor.\nRule Evolution: Propose targeted DFT rule set updates derived from test escapes, physical fixture strain, and post-build rework.\nDeliverables Owned\nFormal testability reviews and fully dispositioned DFT findings prior to CAD freeze.\nStructural and functional coverage models mapped against the MTRS.\nEmpirical evidence packages for achieved coverage on first fixtures.\nFormal DFT rule set change proposals.\nKey Success Metrics\nTotal designed-in coverage achieved on the first physical fixture.\nComplete resolution and closure of DFT findings prior to layout freeze.\nMinimization of test escapes and repeat testability issues across product lines.\nKnowledge/Skills/Competencies\nMust-Have: Strong background in board-level Design for Testability (DFT), electronic schematics, and high-density PCB layout checks.\nHighly Valued: Hands-on experience with In-Circuit Testing (ICT) platforms (e.g., Keysight 3070, Teradyne TestStation, Takaya flying probe), including an understanding of bed-of-nails fixture constraints.\nCore Technical Skills: Experience evaluating multi-device IEEE 1149.1 Boundary Scan / JTAG chains, debug/provisioning access, and test point physical accessibility.\nCoverage Expertise: Practical knowledge of MTRS coverage modeling, functional test strategy, and hardware bring-up.\n Out of Scope: Experience restricted solely to silicon-level ASIC DFT (RTL, ATPG, MBIST, scan insertion inside the die) or pure software validation does not align with the physical board-level requirements of this role.\nPhysical Demands\nDuties of this position are performed in a normal office environment.\nDuties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. \nRepetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.\nOccasional travel may be required.\nTypical Experience\n4+ years of experience in PCBA Design for Testability (DFT), In-Circuit Test (ICT) Engineering, or Manufacturing Test Engineering in a complex electronics or EMS environment\nTypical Education\nRequired: Bachelor’s degree in Electrical Engineering, Electronic Engineering, or 4+ years of direct related technical experience.\nNotes\nThis job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.\nCelestica is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, pregnancy, genetic information, disability, status as a protected veteran, or any other protected category under applicable federal, state, and local laws.\nThis policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated. All information will be kept confidential according to EEO guidelines.\nCelestica is an E-Verify employer.\nCOMPANY OVERVIEW:\nCelestica, Inc. (NYSE: CLS; TSX: CLS) is a technology leader dedicated to driving customer success and market advancements. With deep expertise in design, engineering, manufacturing, supply chain, and platform solutions, Celestica enables critical data center infrastructure for AI, cloud, and hybrid cloud and advances technologies in high-growth markets. With a talented team and a strategic global network, Celestica helps its customers achieve competitive advantages.\nToday, Celestica delivers innovative supply chain solutions globally to customers in strategic two operating and reporting segments: Advanced Technology Solutions (ATS) and Connectivity and Cloud Solutions (CC):\nATS: This segment serves customers in complex, regulated and high-reliability markets such as Industrial & Smart Energy, Aerospace & Defense, Semiconductor Capital Equipment, and HealthTech. It is engineering led, with deep expertise in design, manufacturing and lifecycle solutions.\nCCS: This segment focuses on high-performance technology solutions and services for the data center, serving hyperscalers, digital native customers and enterprises. Celestica's Platform Solutions offering provides innovative and customizable computing, storage and networking solutions enabling AI-driven growth.\nBuilt on a legacy of trust and performance, Celestica has earned its reputation by delivering results in complex and fast-changing markets. Celestica exceeds customer expectations by identifying trends and staying ahead of the curve. Backed by comprehensive capabilities and a global network across North America, Europe and Asia, Celestica helps customers gain competitive advantage with the quality, flexibility and resiliency they need to respond quickly to shifts in demand. Guided by a bold vision to accelerate market advancements, Celestica delivers innovative solutions and technologies that turn complexity into opportunity. Anchored in teamwork and commitment, Celestica strives to be the most trusted partner to its customers and colleagues worldwide.\nCelestica would like to thank all applicants, however, only qualified applicants will be contacted.\nCelestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.","description_format":"text","description_chars":8347,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Electronics Manufacturing"],"lifecycle":[{"event":"open","at":"2026-11-10T22:39:38Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 47 · green card filings: 3","filings_12m":47,"filings_prev_12m":5,"green_card_filings_12m":3,"median_offered_wage_usd":151100,"route":null,"cap_exempt":false,"checked_at":"2026-11-10T11:34:35+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":12}],"liveness":{"score":76,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.849,"p_room":0.9,"age_days":11,"expected_fill_days":20,"reasons":["conf:5","win:mid","comp:brand"],"computed_at":"2026-11-11T04:02:20Z"},"pay":null,"html_url":"https://alion.io/job/celestica-senior-lead-hardware-dft-testability-engineer-pcba","json_url":"https://alion.io/job/celestica-senior-lead-hardware-dft-testability-engineer-pcba.json","meta":{"generated_at":"2026-11-11T04:02:20Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":3931,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-12T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58064},"rest":"https://alion.io/mcp/rest/get_company?id=58064"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcelestica-senior-lead-hardware-dft-testability-engineer-pcba"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcelestica-senior-lead-hardware-dft-testability-engineer-pcba"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcelestica-senior-lead-hardware-dft-testability-engineer-pcba"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/celestica-senior-lead-hardware-dft-testability-engineer-pcba\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcelestica-senior-lead-hardware-dft-testability-engineer-pcba"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4042404}},{"tool":"search_jobs","arguments":{"company":"celestica.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4042404},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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