{"id":198328,"url":"https://alion.io/job/cerebras-systems-pcb-layout-engineering-lead","title":"PCB Layout Engineering Lead","company":{"id":31,"name":"Cerebras Systems","domain":"cerebras.ai","url":"https://alion.io/company/cerebras-systems","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"B","score":79,"open_postings":24,"ghost_share":0,"stale_share":0.625,"repost_share":0,"time_to_fill_p50_days":93,"computed_at":"2026-10-20T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sunnyvale, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":210000,"max":230000,"currency":"USD","period":"year","gross":null,"usd_annual":230000},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"AI Agents","optional":false},{"name":"Altium Designer","optional":false},{"name":"Cadence Allegro","optional":false},{"name":"Cerebras","optional":false},{"name":"Edge AI","optional":false},{"name":"OpenAI","optional":false},{"name":"TPU","optional":false}],"status":"live","first_seen_at":"2026-09-03T16:41:47Z","employer_posted_date":"2026-09-03","last_verified_at":"2026-10-20T15:33:41Z","board_verified":true,"closed_at":null,"days_open":47,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":47},"description":"Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. \nThis order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.\nCerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference.\nCerebras is seeking an exceptional PCB Layout Lead to own the physical implementation of complex, high-performance printed circuit boards for AI systems. This role will translate schematics and engineering requirements into production-ready layouts, optimizing signal integrity, power integrity, thermal performance, reliability, and manufacturability.\nResponsibilities\nOwn multilayer PCB layout from initial component placement through fabrication and assembly release.\n\nTranslate schematics, mechanical constraints, and electrical requirements into constraint-driven board designs using industry-standard PCB layout tools.\n\nDefine and implement board stackups, controlled-impedance structures, routing rules, reference planes, return paths, and length- and phase-matching constraints.\n\nPlace and route high-speed digital, high-current power, and sensitive analog circuits, including dense BGA fanout and differential interfaces.\n\nApply signal-integrity and power-integrity best practices to minimize crosstalk, discontinuities, noise, voltage drop, and electromagnetic interference.\n\nCollaborate with electrical, SI/PI, mechanical, thermal, compliance, manufacturing, and test engineers to establish constraints and resolve layout issues.\n\nWork with fabrication and assembly partners to select materials, validate stackups and via structures, and improve yield, cost, and schedule.\n\nPerform design reviews and DFM, DFA, and DFT checks; generate and verify fabrication drawings, assembly drawings, drill data, Gerbers, ODB++, IPC-2581, and related release packages.\n\nMaintain component footprints, padstacks, design libraries, layout standards, and release documentation.\n\nSupport prototype builds, board bring-up, failure analysis, and layout revisions through production.\n\nMinimum Qualifications\nBachelor’s degree in electrical engineering, electronics engineering, or a related field, or equivalent practical experience.\n\n10+ years of hands-on experience laying out complex, high-speed, multilayer printed circuit boards.\n\nExpertise with Cadence Allegro PCB Designer and Constraint Manager; experience with Altium Designer or equivalent tools is also relevant.\n\nStrong knowledge of component placement, controlled-impedance routing, differential pairs, length matching, return-path continuity, and power distribution.\n\nExperience with dense BGA escape routing, HDI structures, blind and buried vias, microvias, via-in-pad, and backdrilling.\n\nWorking knowledge of signal integrity, power integrity, EMI/EMC, thermal design, creepage and clearance, and high-current routing.\n\nExperience applying IPC standards and fabrication, assembly, test, and manufacturability requirements.\n\nAbility to create and review complete PCB fabrication and assembly release packages.\n\nAbility to thrive in a fast-paced, dynamic environment and adapt to changing priorities.\n\nExcellent collaborative and interpersonal skills with multi-disciplined teams.\n\nExperience working on server hardware, AI accelerators, hardware accelerator, datacenter, AI Hardware, enterprise product, GPU, CPU, TPU, server platform etc.\n\nPreferred Qualifications\nExperience designing large, high-layer-count boards for compute, networking, server, or AI accelerator systems.\n\nExperience routing high-speed interfaces such as DDR4/DDR5, PCIe Gen4/Gen5 or later, Ethernet, USB, and multi-gigabit SerDes.\n\nExperience with high-current, low-voltage power delivery, VRM placement, decoupling strategy, copper balancing, and thermal optimization.\n\nExperience developing Allegro SKILL, scripts, or automation that improves layout quality and release efficiency.\n\nDemonstrated success delivering first-pass functional boards and supporting products from prototype through volume production.\n\nLocation: Remote. Sunnyvale, CA (Hybrid) is highly preferred.\nThe base salary range for this position is $210,000 - $230,000+ annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.\n\nWhy Join Cerebras\nPeople who are serious about software make their own hardware. At Cerebras, we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:\nBuild a breakthrough AI platform beyond the constraints of the GPU.\n\nPublish and open source their cutting-edge AI research.\n\nWork on one of the fastest AI supercomputers in the world.\n\nEnjoy job stability with startup vitality.\n\nOur simple, non-corporate work culture that respects individual beliefs.\n\nFind out more about what it's like to work at Cerebras here!\nApply today and become part of the forefront of groundbreaking advancements in AI!\nCerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.\nThis website or its third-party tools process personal data. For more details, click here to review our CCPA disclosure notice.","description_format":"text","description_chars":6073,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Continuous learning","Equity"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware","AI Compute & Inference","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-09-03T20:42:49Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 43 · green card filings: 5","filings_12m":43,"filings_prev_12m":27,"green_card_filings_12m":5,"median_offered_wage_usd":200938,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":6}],"liveness":{"score":56,"band":"ok","label":"Likely open","p_open":1,"p_active":0.628,"p_room":0.9,"age_days":46,"expected_fill_days":93,"reasons":["conf:3","stale_co","velocity","win:mid","comp:brand"],"computed_at":"2026-10-20T05:45:00Z"},"pay":{"stated_usd_annual":230000,"is_top_pay":true},"html_url":"https://alion.io/job/cerebras-systems-pcb-layout-engineering-lead","json_url":"https://alion.io/job/cerebras-systems-pcb-layout-engineering-lead.json","meta":{"generated_at":"2026-10-20T16:51:54Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":19122,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-21T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":31},"rest":"https://alion.io/mcp/rest/get_company?id=31"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcerebras-systems-pcb-layout-engineering-lead"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcerebras-systems-pcb-layout-engineering-lead"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcerebras-systems-pcb-layout-engineering-lead"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cerebras-systems-pcb-layout-engineering-lead\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcerebras-systems-pcb-layout-engineering-lead"}]}