{"id":1199492,"url":"https://alion.io/job/cesiumastro-senior-staff-fpga-engineer","title":"Senior Staff FPGA Engineer","company":{"id":5315,"name":"CesiumAstro","domain":"cesiumastro.com","url":"https://alion.io/company/cesiumastro","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"A","score":87,"open_postings":30,"ghost_share":0,"stale_share":0.533,"repost_share":0,"time_to_fill_p50_days":46,"computed_at":"2026-10-19T05:45:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["El Segundo, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":193000,"max":236000,"currency":"USD","period":"year","gross":null,"usd_annual":236000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"HDL Coder","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Agile","optional":true}],"status":"live","first_seen_at":"2026-09-24T19:32:57Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-10-19T02:37:47Z","board_verified":true,"closed_at":null,"days_open":24,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":24},"description":"We are looking to add a Senior Staff FPGA Engineer to our team. If you enjoy working in a startup environment, and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.\nIn this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board-level hardware design is also helpful in the role.\nAs a senior staff level employee, you will present engineering design review materials to our customers and executive team, as well as participate in proposal-writing efforts. As such, excellent written and verbal communication skills are required.\nJOB DUTIES AND RESPONSIBILITIES\nLead FPGA design and verification efforts for space-based programs ensuring compliance with industry standards and program requirements.\nWork with cross-functional teams (system engineering, hardware designers, and software engineers) to define FPGA architecture, partitioning, interface definitions, and specifications.\nDevelop FPGA architecture based on high level system requirements to formulate part selections and SWAP-C estimates with an emphasis on FPGA utilizations and power consumption.\nAct as the subject matter expert when participating in design reviews and bringing technical expertise and insight to the team.\nMentor and guide junior FPGA designers to drive for efficiency, quality, and consistency.\nMaintain pulse on emerging technologies to drive future product development for space applications.\nJOB REQUIREMENTS AND MINIMUM QUALIFICATIONS\nA Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.\n12 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level. \nProficiency in VHDL and/or Verilog design capture.\nFamiliarity with radiation-tolerant FPGA devices (Xilinx Versal, Xilinx UltraScale+, Xilinx RFSoC, Micorsemi PolarFire, RTG-4).\nExpertise in FPGA implementation (synthesis, place and route and timing closure) and verification.\nProficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi tool flows.\nStrong understanding of space environment considerations and radiation effects on FPGA parts to develop mitigation techniques.\nHands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.\nExperience with high-speed interfaces and power optimization techniques for space applications.\nProven track record of successful FPGA designs deployed in space programs.\nExcellent written and verbal communication skills.\nPREFERRED EXPERIENCE\nExperience with worst-case analysis, failure method and criticality analyses, and reliability analysis.\nFamiliarity with digital communications and digital signal processing.\nExperience with board-level hardware design.\nDemonstrated ability to work efficiently with a distributed team.\nProficiency with git source code control.\nExperience developing firmware using agile flows.","description_format":"text","description_chars":3520,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Hardware","Space & Aerospace","Embedded & Electronics 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