{"id":1159517,"url":"https://alion.io/job/cesiumastro-staff-fpga-verification-engineer-2","title":"Staff FPGA Verification Engineer","company":{"id":5315,"name":"CesiumAstro","domain":"cesiumastro.com","url":"https://alion.io/company/cesiumastro","size_band":"1001-5000","is_staffing_agency":false,"is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"B","score":72,"open_postings":23,"ghost_share":0,"stale_share":0.913,"repost_share":0,"time_to_fill_p50_days":65,"computed_at":"2026-09-24T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Westminster, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":158000,"max":189000,"currency":"USD","period":"year","gross":null,"usd_annual":189000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Git","optional":false},{"name":"Jira","optional":false},{"name":"MATLAB","optional":false},{"name":"Microsoft Office","optional":false},{"name":"Outlook","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Siemens QuestaSim","optional":false},{"name":"UVM","optional":false},{"name":"Xilinx Vivado","optional":false},{"name":"Agile","optional":true}],"status":"live","first_seen_at":"2026-09-23T17:15:34Z","employer_posted_date":"2026-09-23","last_verified_at":"2026-09-25T01:41:23Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"We are looking to add a Staff FPGA Engineer to our team. If you enjoy working in a startup environment, and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.\nIn this position, you provide technical leadership for the verification of FPGA-based hardware solutions for products and platforms. This role contributes to product development by establishing FPGA verification methodologies, resolving complex engineering challenges, and advancing FPGA solutions that improve product performance, reliability, and mission success.\nJOB DUTIES AND RESPONSIBILITIES\nLead complex FPGA verification, debugging, and qualification activities supporting product development.\nEvaluate simulation results and engineering risks while directing solutions that improve product performance and reliability.\nValidate FPGA designs through verification planning, qualification testing, failure analysis, root cause investigations, and engineering change implementation.\nDevelop verification plans, and verification review packages supporting engineering decisions.\nSupport customer meetings, design reviews, technical discussions, hardware integration, and product development activities by providing FPGA engineering guidance.\nEvaluate FPGA, verification methods and technical requirements to identify improvements.\nDrive initiatives that enhance FPGA performance, engineering efficiency, product reliability, design quality, and long-term maintainability.\nJOB REQUIREMENTS AND MINIMUM QUALIFICATIONS\nA Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.\n8 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level. \nExtensive knowledge of digital logic design, FPGA architecture, hardware description languages (HDL), and digital systems.\nConsiderable proficiency developing FPGA verification environments for complex products.\nThorough understanding of FPGA verification methodologies, timing closure, embedded systems, and high-speed interfaces.\nWorking knowledge of the UVM Framework (UVMF), including developing reusable testbenches, verification components, and automated test environments.\nProficiency with Microsoft Office Suite including Outlook, Word, Excel, PowerPoint, and Teams.\nFPGA development, simulation, and synthesis tools, e.g. Vivado, Quartus Prime, ModelSim, QuestaSim, or equivalent applications.\nEngineering analysis, version control, and collaboration tools, e.g. MATLAB, Git, Jira, Windchill, or equivalent applications.\nExcellent written and verbal communication skills.\nPREFERRED EXPERIENCE\nExperience with worst-case analysis, failure method and criticality analyses, and reliability analysis.\nFamiliarity with digital communications and digital signal processing.\nExperience with board-level hardware design.\nDemonstrated ability to work efficiently with a distributed team.\nProficiency with git source code control.\nExperience developing firmware using agile flows.","description_format":"text","description_chars":3133,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Space & Aerospace","Satellite Communications"],"lifecycle":[{"event":"open","at":"2026-09-23T23:04:14Z"}],"liveness":{"score":70,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.695,"p_room":1,"age_days":0,"expected_fill_days":65,"reasons":["conf:2","stale_co","wave","velocity","win:early","comp:brand"],"computed_at":"2026-09-24T05:45:00Z"},"pay":{"stated_usd_annual":189000,"is_top_pay":false},"html_url":"https://alion.io/job/cesiumastro-staff-fpga-verification-engineer-2","json_url":"https://alion.io/job/cesiumastro-staff-fpga-verification-engineer-2.json","meta":{"generated_at":"2026-09-25T02:02:54Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":2111,"day_limit":5000,"remaining_today":2889,"minute_limit":60,"resets_at":"2026-09-26T00:00:00Z"}}}