{"id":2227826,"url":"https://alion.io/job/ciena-senior-analog-layout-engineer","title":"Senior Analog Layout Engineer","company":{"id":1996,"name":"Ciena Corporation","domain":"ciena.com","url":"https://alion.io/company/ciena","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Ottawa, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":114000,"max":182000,"currency":"CAD","period":"year","gross":null,"usd_annual":127696},"salary_estimate":null,"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Ansys Totem","optional":false},{"name":"Cadence Virtuoso","optional":false},{"name":"Siemens Calibre","optional":false}],"status":"live","first_seen_at":"2026-07-20T00:00:00Z","employer_posted_date":"2026-07-20","last_verified_at":"2026-10-12T02:28:25Z","board_verified":true,"closed_at":null,"days_open":84,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":84},"description":"As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact.\nWhat will you do at Ciena as a Analog Layout Engineer?\nThe Wavelogic family of products are widely used in Ciena's optical fiber transmission solutions and are one of the main contributors to Ciena's success in the telecommunications industry. Successful candidates will be joining a vibrant team with a proven track-record of success over 30-years of evolution and revolution in the advancement of high-speed circuits used in broadband fiber-optic modems. This team pioneered the introduction of the world’s first high-speed DAC and ADC analog macros that ushered in the era of coherent fiber-optic product solutions.\nTo further strengthen our team, we are looking for a hardworking analog layout engineer who will be working on advanced high-speed analog design circuits in the latest deep-submicron CMOS and/or BiCMOS technologies. Your role as an analog layout engineer will be to drive and implement best-in-class high-speed analog layouts that extract the highest performance from the world’s most advanced CMOS and BiCMOS technologies. These analog macros include electrical interface-facing DAC and ADC based SERDES solutions for 112G and 224G, optical-line-facing high-speed DAC and ADC circuits interfacing with optical modulators and detectors, transimpedance amplifiers, modulator driver circuits, and critical precision analog circuits for control and monitoring functions, etc.\nResponsibilities:\nCarry out layout feasibility studies on various circuit designs in collaboration with senior analog designers. The goal will be to find the best possible solution considering various trade-offs and discussions with team members.\nCreate layouts of assigned analog blocks by adhering to the steps of floor planning, placement and routing.\nConduct thorough verification checks such as DRC, ANT, LVS, PERC, EM, IR to ensure the final layout possesses the highest level of quality.\nInvestigate new features within the layout tools and processes used for creating layouts with the aim of enhancing productivity.\nProvide regular status updates, participate in team meetings and share experiences with the rest of the group.\nWhat technical experience and personal skills are required for this role?\nBachelor's degree in Electrical Engineering or related field, with 1-5 years of relevant industry experience.\nExperience in custom analog and mixed signal layout design with a strong knowledge of deep sub-micron CMOS devices (e.g. Finfet transistors).\nHighly motivated with strong team player skills, exhibits a positive can-do attitude and ability to seamlessly integrate into an existing team culture.\nStrong communication and interpersonal skills to collaborate with cross-functional teams.\nExperience in custom layout design of Analog/Mixed Signal designs (e.g. ADC, DAC, PLL, SERDES …)\nProficiency in using industry-standard layout tools (e.g., Cadence Virtuoso, Siemens Calibre, Ansys Totem …) and familiarity with layout design flows for advanced technology nodes.\nStrong analytical and problem-solving skills to identify and address layout-related issues efficiently.\nProficient in layout techniques for Floor Planning, device matching, minimizing parasitics, RF shielding, EM, IR drop, ESD and high-frequency routing.\nMeticulous attention to details, ensuring the highest level of accuracy and quality in all layout designs.\nFamiliarity with semiconductor manufacturing processes and foundry technologies.\nAbility to thrive in a fast-paced, dynamic work environment and adapt quickly to changing project requirements.\nSolid understanding of RC delay, electromigration, and coupling effects.\nFamiliarity with guard rings, DNW, PN junctions, advanced process effects such as LOD, OSE, WPE\nHigh level of proficiency in interpreting DRC, PERC, ANT, ERC and LVS\nAbility to identify failure-prone circuit and layout structures and proactively work with circuit designers to resolve problems.\nScripting skills in PERL or SKILL are a plus, but not required.\nThe above statements are intended to describe the work being performed by people assigned to this job. They are not intended to be an exhaustive list of all responsibilities, duties and skills required. The duties and responsibilities of this position are subject to change and other duties may be assigned or removed at any time. You will have an opportunity to better understand the role through the interview experience.\nPay Range: The annual salary range is $114,000 - $182,000 CAD\nVacancy Status: Future Opportunity\nPay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.\nNon-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.\nAt Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.\nCiena is an Equal Opportunity Employer, including disability and protected veteran status.\nIf contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.","description_format":"text","description_chars":6281,"description_truncated":false,"requirements":{"experience_years_min":1,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Flexible schedule","Parental leave"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Telecom Infrastructure","Optical Communications"],"lifecycle":[{"event":"open","at":"2026-10-10T16:58:59Z"}],"visa":[{"country":"CA","licensed_sponsor":true,"evidence":"Positions approved through LMIA in 12 months: 5","filings_12m":5,"filings_prev_12m":2,"green_card_filings_12m":null,"median_offered_wage_usd":null,"route":"Global Talent Stream; High Wage","cap_exempt":false,"checked_at":"2026-10-03T21:10:52+00:00","sources":["ESDC: employers issued a positive LMIA"],"filings_for_role_12m":2}],"liveness":{"score":6,"band":"cold","label":"Long shot","p_open":1,"p_active":0.217,"p_room":0.28,"age_days":84,"expected_fill_days":10,"reasons":["conf:0","win:tail","crowd:brand"],"computed_at":"2026-10-12T03:12:55Z"},"pay":{"stated_usd_annual":127696,"is_top_pay":false},"html_url":"https://alion.io/job/ciena-senior-analog-layout-engineer","json_url":"https://alion.io/job/ciena-senior-analog-layout-engineer.json","meta":{"generated_at":"2026-10-12T03:12:55Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4927,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1996},"rest":"https://alion.io/mcp/rest/get_company?id=1996"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fciena-senior-analog-layout-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fciena-senior-analog-layout-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fciena-senior-analog-layout-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/ciena-senior-analog-layout-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fciena-senior-analog-layout-engineer"}]}