{"id":3883115,"url":"https://alion.io/job/cirrus-logic-principal-ai-secure-platform-architect","title":"Principal SoC Development Platform Engineer","company":{"id":449717,"name":"Cirrus Logic","domain":"cirrus.com","url":"https://alion.io/company/cirrus-logic","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"B","score":71,"open_postings":121,"ghost_share":0.397,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":63,"computed_at":"2026-11-11T05:49:22Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Agentic Workflows","optional":false},{"name":"AI Agents","optional":false},{"name":"C++","optional":false},{"name":"CI/CD","optional":false},{"name":"LLVM","optional":false},{"name":"MLIR","optional":false},{"name":"Python","optional":false},{"name":"Apache TVM","optional":true},{"name":"IREE","optional":true},{"name":"LiteRT","optional":true},{"name":"ONNX","optional":true},{"name":"PyTorch","optional":true}],"status":"live","first_seen_at":"2026-11-06T17:48:48Z","employer_posted_date":"2026-11-06","last_verified_at":"2026-11-11T12:52:41Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":4},"description":"We are seeking an exceptional Principal SoC Development Platform Engineer to architect and build next-generation, AI-native software development environments for advanced semiconductor platforms. As part of Cirrus Logic Venture Labs, this role will help shape the software foundations for emerging intelligent edge computing solutions.\nA successful candidate will bridge SoC architecture, compiler technologies, embedded software, AI-driven development tools, and secure cloud infrastructure to create integrated, scalable developer platforms. A key focus will be simplifying complex hardware/software development workflows while enabling secure collaboration across customers, technology partners, and third-party software providers.\nCentral to this role is the development of secure, multi-tenant development environments and end-to-end software lifecycle management, ensuring the protection of proprietary software, algorithms, models, and intellectual property from development through deployment on silicon.\nWe are looking for a hands-on architect and builder with deep expertise in compilers and SoC software development, broad systems thinking, and an entrepreneurial mindset. This individual will be a foundational member of a small, highly capable team, with the autonomy and ownership to architect, implement, and deliver new capabilities from the ground up.\nKey Responsibilities\nCompiler and Heterogeneous Compute Architecture\nArchitect a unified compilation and deployment framework spanning embedded firmware, DSP algorithms, ML models, and FPGA RTL configurations.\nDevelop and integrate compiler frontends, intermediate representations, optimization passes, backends, and runtime frameworks targeting heterogeneous compute resources.\nCollaborate with silicon architects to optimize instruction sets, custom operators, accelerator interfaces, memory architecture, workload partitioning, and system-level power, performance, and area (PPA).\nEstablish common abstractions for execution, interoperability, and data movement across CPUs, DSP engines, ML accelerators, and configurable logic.\nAI-Native Development and Toolchain Automation\nBuild a headless, AI-agent-driven development platform that transforms natural-language application intent into compiled, validated, and deployable hardware/software pipelines.\nLeverage LLMs and agentic workflows to automate code generation, workload partitioning, compiler optimization, build orchestration, simulation, testing, and debugging.\nIntegrate heterogeneous programming environments into a unified toolchain, from application and model development through executable binaries and programmable-logic configurations.\nEstablish reproducible, deterministic build and validation processes while using AI to accelerate development and optimization.\nIntegrate compilation, simulation, debugging, profiling, and validation into a unified, AI-orchestrated development workflow that accelerates development from concept to deployable artifacts.\nSecure Multi-Tenant Cloud Platform and Software Lifecycle\nArchitect and own a secure, cloud-native, multi-tenant development environment supporting collaboration among Cirrus, third-party software IP providers, and customers.\nEstablish an end-to-end secure software development lifecycle (SSDLC) encompassing IP onboarding, development, compilation, integration, simulation, validation, artifact signing, secure distribution, deployment, and lifecycle updates.\nDesign strong tenant isolation, identity and access controls, encryption, secrets management, and protected build and execution environments to safeguard proprietary source code, ML models, and algorithms.\nEstablish software provenance, integrity verification, secure boot and provisioning interfaces, and chain-of-trust mechanisms extending from cloud development infrastructure to execution on silicon.\nEnable controlled collaboration, debugging, profiling, and system-level simulation across vendor boundaries while maintaining confidentiality, access restrictions, and auditable software supply chains.\nTechnical Leadership and Execution\nPartner closely with SoC architects, ML engineers, DSP specialists, embedded software teams, and security experts to shape the hardware/software platform architecture.\nEvaluate and integrate open-source and commercial compiler frameworks, AI development technologies, simulation platforms, and secure cloud infrastructure.\nDrive architectural decisions, develop working prototypes, and establish the technical foundation for a scalable third-party developer ecosystem.\nOperate autonomously in an early-stage innovation environment, balancing long-term architectural vision with rapid experimentation and execution.\nRequired Skills and Qualifications\nEducation and Experience: Master's or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent technical expertise, with 10+ years of relevant experience in compiler development, embedded systems, heterogeneous computing, or developer platforms.\nCompiler and Hardware Architecture: Deep knowledge of compiler design, code generation, optimization, runtime systems, and processor microarchitecture, with hands-on experience in LLVM, MLIR, GCC, or comparable compiler infrastructure.\nEmbedded and Heterogeneous Computing: Strong experience with ARM embedded development and exposure to DSP programming, ML inference deployment, accelerator mapping, and FPGA development flows.\nSecure Cloud Development: Experience architecting cloud-native developer platforms, multi-tenant infrastructure, secure build environments, CI/CD pipelines, and software supply-chain security.\nSoftware Security and Lifecycle: Understanding of secure software development practices, workload isolation, cryptographic signing, software provenance, trusted execution, secure deployment, and protection of third-party intellectual property.\nAI and Automation: Demonstrated experience applying LLMs, AI agents, and automated engineering workflows to software development, compilation, testing, or complex toolchain orchestration.\nSoftware Engineering: Strong proficiency in C/C++, Python, APIs, SDKs, build systems, and distributed development infrastructure.\nSystems Leadership: Proven ability to architect and deliver complex, cross-disciplinary systems, operate independently, and influence decisions spanning silicon, software, security, and customer experience.\nPreferred Skills and Qualifications\nExperience developing compilers, runtimes, or programming environments for NPUs, AI accelerators, DSPs, GPUs, or custom processor architectures.\nFamiliarity with ML compilation and deployment frameworks such as TVM, IREE, ONNX, TensorFlow Lite, or PyTorch.\nExperience with FPGA synthesis, hardware/software co-simulation, virtual platforms, and performance modeling.\nExperience designing secure multi-party development platforms, confidential computing environments, hardware roots of trust, or protected IP distribution ecosystems.\nBackground in semiconductor startups, emerging compute architectures, developer ecosystems, or early-stage technology incubation.\nWhat Success Looks Like\nA successful candidate will establish the software foundations that make advanced compute platforms more accessible, programmable, and scalable. They will translate complex technical challenges into intuitive, robust development capabilities that accelerate innovation, simplify integration, and improve developer productivity.\nSuccess will be measured by the ability to bring together diverse hardware and software technologies into cohesive, secure, and efficient development workflows, enabling rapid experimentation, seamless collaboration, and a streamlined path from concept to deployment.\nOur ambition is to fundamentally simplify how developers engage with advanced computing platforms, removing technical barriers and accelerating the journey from innovation to real-world applications.","description_format":"text","description_chars":7952,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Processors, MCUs & AI Chips","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-11-06T18:48:43Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 4 · green card filings: 4","filings_12m":4,"filings_prev_12m":4,"green_card_filings_12m":4,"median_offered_wage_usd":150000,"route":null,"cap_exempt":false,"checked_at":"2026-11-11T07:38:50+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":2}],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":4,"expected_fill_days":63,"reasons":["conf:2","velocity","win:early","comp:brand"],"computed_at":"2026-11-11T05:49:22Z"},"pay":null,"html_url":"https://alion.io/job/cirrus-logic-principal-ai-secure-platform-architect","json_url":"https://alion.io/job/cirrus-logic-principal-ai-secure-platform-architect.json","meta":{"generated_at":"2026-11-11T14:55:15Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27664,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-12T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":449717},"rest":"https://alion.io/mcp/rest/get_company?id=449717"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcirrus-logic-principal-ai-secure-platform-architect"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcirrus-logic-principal-ai-secure-platform-architect"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcirrus-logic-principal-ai-secure-platform-architect"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cirrus-logic-principal-ai-secure-platform-architect\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcirrus-logic-principal-ai-secure-platform-architect"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3883115}},{"tool":"search_jobs","arguments":{"company":"cirrus.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3883115},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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