{"id":1621739,"url":"https://alion.io/job/cirrus-logic-senior-digital-design-engineer","title":"Senior Digital Design Engineer","company":{"id":449717,"name":"Cirrus Logic","domain":"cirrus.com","url":"https://alion.io/company/cirrus-logic","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"C","score":59,"open_postings":115,"ghost_share":0.687,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-13T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Edinburgh, United Kingdom"],"countries":["GB"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":65000,"max_usd":111000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":34},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"MATLAB","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-09-25T15:52:25Z","employer_posted_date":"2026-09-25","last_verified_at":"2026-10-13T08:17:40Z","board_verified":true,"closed_at":null,"days_open":17,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":17},"description":"We have an exciting opportunity for a highly skilled Digital IC Design Engineer to join our growing design and development team in Edinburgh. You will work within our High-Performance Mixed-Signal R&D division, which develops industry-leading SoCs for global consumer markets. You will be part of an organisation operating at the forefront of cutting-edge technology.\nKey Responsibilities:\nDesign and develop new digital circuit architectures from concept, architecture, design, design integration through to production on advanced process nodes including development of block level testbenches \nCollaborate with a team of engineers with responsibility for the delivery of complex mixed-signal products and IPs \nContribute to technical reviews and ensure IP quality using checklists \nInfluence the growth of the team through supervision of junior engineers \nRequired Skills and Qualifications:\nBachelor’s, Master's or Doctorate degree in Electrical Engineering (or related discipline) with an extensive proven background in digital CMOS circuit design \nImplementation of complex digital circuits and sub-systems in RTL using Verilog / SystemVerilog \nUnderstanding of digital system-level design, including use of standard bus protocols, bus architecture design and chip-level clock and reset architectures \nVerification of block-level digital designs \nUnderstanding of synthesis and timing analysis of digital circuits \nGood interpersonal skills, share technical expertise and knowledge, contribute to design reviews, work optimally to resolve conflicts \nOrganised, detailed, and meticulous with strong communication skills \nSelf-motivated with strong analytical and problem-solving skills \nAbility to work with a sense of urgency and thrive in a dynamic environment \nPreferred Skills and Qualifications:\nAn understanding, appreciation, and passion for mixed signal engineering \nExperience working within UVM based verification environments \nScripting and automation of design tasks \nExperience with AMBA, SPI, I2C protocols \nLab and silicon validation skills; Experience of chip bring-up and debug from design perspective \nGood understanding of Linting, CDC and RDC tools \nCollaboration with DFT and Place and Route teams \nBoard level interface standards and interface design \nExperience with clock generation circuits and handling multiple clock domains \nExperience with Power gating and low power design techniques \nExperience with ARM, RISC-V, or similar microcontrollers as well as memory controllers \nDSP filter design using MATLAB and signal analysis techniques","description_format":"text","description_chars":2568,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United Kingdom","iso":"GB","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-10-01T20:48:18Z"}],"visa":[],"liveness":{"score":50,"band":"ok","label":"Likely open","p_open":1,"p_active":0.561,"p_room":0.9,"age_days":17,"expected_fill_days":28,"reasons":["conf:1","stale_co","velocity","win:mid","comp:brand"],"computed_at":"2026-10-13T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/cirrus-logic-senior-digital-design-engineer","json_url":"https://alion.io/job/cirrus-logic-senior-digital-design-engineer.json","meta":{"generated_at":"2026-10-13T11:26:56Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":17701,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-14T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":449717},"rest":"https://alion.io/mcp/rest/get_company?id=449717"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcirrus-logic-senior-digital-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcirrus-logic-senior-digital-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcirrus-logic-senior-digital-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cirrus-logic-senior-digital-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcirrus-logic-senior-digital-design-engineer"}]}