{"id":3073825,"url":"https://alion.io/job/cisco-systems-asic-design-verification-engineer-6","title":"ASIC Design Verification Engineer","company":{"id":90,"name":"Cisco Systems","domain":"cisco.com","url":"https://alion.io/company/cisco-systems","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":237,"ghost_share":0.03,"stale_share":0.456,"repost_share":0.101,"time_to_fill_p50_days":25,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Taipei, Taiwan"],"countries":["TW"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":30000,"max_usd":70000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1777},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Docker","optional":false},{"name":"OpenStack","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-10-20T00:00:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-22T23:09:28Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"What You'll Do\nIt used to be that high-speed packet forwarding was performed in dedicated ASIC designs. These days we are looking to make those ASICs more general and programmable. Cisco Common ASIC Group is looking for an expert Senior Verification Engineer to drive existing projects and engage in new development of our next generation switching systems.\nAs part of ASIC team, you will be developing the ASICs at the heart of each of these switch products. There are only a very few teams worldwide that implement such devices. Every time you access the Internet, chances are, your data's been through one of our switches.\nWho You'll Work With\nYou will work with Cisco’s best-in-class switching solution team. Our team is responsible for driving integration of the Nexus systems and ACI with software, including OpenStack, Docker, and Open vSwitch, to help our customers build multitenant clouds.\nWho You Are\nYou are a talented, motivated ASIC verification engineer to join the team and contribute to the verification of very complex ASICs. You will have a Design Verification background, hands-on experience in System Verilog and UVM methodology, with in-depth knowledge of C++, scripting, as well as ASIC design and verification flow.\nYou’ll be part of Cisco Common ASIC Group, focusing on developing various test benches and contributing to different aspects of verification infrastructure.\nYou will collaborate closely with the design team and the hardware team to verify the ASIC in simulation, in emulation and during ASIC bring up.\nResponsibilities Include:\nDesigning UVM/SystemVerilog testbenches.\nDefining new DV methodologies.\nEnhancing existing testbenches.\nEnd-to-end verification of various design blocks.\nContributing to top level verification.\nBe a part of emulation testing efforts.\nParticipate in the ASIC bring-up\nEducation and Experience Required:\nBachelor’s or master’s degree in EE and CE.\n5+ years of ASIC Design Verification\nKnowledge and Skills:\nHands-on and deep understanding of System Verilog and UVM methodology\nAbility to construct testbench including scoreboard, agents, sequencers, and monitors\nAbility to debug issues independently\nProven Scripting experience (Python, Perl, TCL, shell programming) is a plus\nProficient in functional coverage and constrained random DV environments\nProficient in merging and analyzing code coverage data generated functional simulation\nGood written and verbal communication skills\nVery good hands-on knowledge on latest high speed Ethernet protocol and packets\nGood working knowledge in C, C++ programming and debugging skills\nCollaborative and team-focused, with the drive to learn and grow\nWe do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.\nWhy Cisco?\nAt Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.\nFueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.\nWe are Cisco, and our power starts with you.","description_format":"text","description_chars":3671,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Taiwan","iso":"TW","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Network Security","Unified Communications","Endpoint Security","Observability & APM"],"lifecycle":[{"event":"open","at":"2026-10-22T10:10:30Z"}],"visa":[],"liveness":{"score":99,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.993,"p_room":1,"age_days":3,"expected_fill_days":25,"reasons":["conf:6","wave","velocity","win:early","comp:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/cisco-systems-asic-design-verification-engineer-6","json_url":"https://alion.io/job/cisco-systems-asic-design-verification-engineer-6.json","meta":{"generated_at":"2026-10-23T18:21:23Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27977,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":90},"rest":"https://alion.io/mcp/rest/get_company?id=90"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcisco-systems-asic-design-verification-engineer-6"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcisco-systems-asic-design-verification-engineer-6"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcisco-systems-asic-design-verification-engineer-6"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cisco-systems-asic-design-verification-engineer-6\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcisco-systems-asic-design-verification-engineer-6"}]}