{"id":679921,"url":"https://alion.io/job/cisco-systems-asic-engineer-5","title":"ASIC Engineer","company":{"id":90,"name":"Cisco Systems","domain":"cisco.com","url":"https://alion.io/company/cisco-systems","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":92,"open_postings":204,"ghost_share":0.01,"stale_share":0.446,"repost_share":0.059,"time_to_fill_p50_days":16,"computed_at":"2026-10-01T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Tel Aviv, Israel","Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":111000,"max_usd":257000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":536},"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"UVM","optional":false},{"name":"MATLAB","optional":true}],"status":"live","first_seen_at":"2026-07-23T00:00:00Z","employer_posted_date":"2026-07-23","last_verified_at":"2026-10-01T04:25:35Z","board_verified":true,"closed_at":null,"days_open":70,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":70},"description":"Meet the Team\nJoin the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.\nWe leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.\nCisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.\nYour Impact\nReview micro-architecture specifications\nImplement Verification environment UVM based\nCollaborate with Design engineers to resolve bugs and achieve coverage closure\nWork with the firmware/Lab teams to verify chip flows\nPerform debug, root-cause analysis, and post-silicon validation in the lab\nMinimum Qualifications\nB.Sc./M.Sc. in Electrical Engineering from a top university\n4+ years of experience in the filed\nknowledge with UVM and functional verification methodologies Preferred Qualifications\nExperience with MATLAB simulations and bit-exact modeling environments\nFamiliarity with mixed-signal systems and environments\nKnowledge and hands-on experience with Clock Domain Crossing (CDC)\nWhy Cisco?\nAt Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.\nFueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.\nWe are Cisco, and our power starts with you.","description_format":"text","description_chars":2149,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Israel","iso":"IL","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Network Security","Unified Communications","Network Equipment","Observability & APM"],"lifecycle":[{"event":"open","at":"2026-09-10T23:23:11Z"}],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":1,"p_active":0.387,"p_room":0.28,"age_days":70,"expected_fill_days":16,"reasons":["conf:1","wave","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-01T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/cisco-systems-asic-engineer-5","json_url":"https://alion.io/job/cisco-systems-asic-engineer-5.json","meta":{"generated_at":"2026-10-01T10:56:39Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":2187,"day_limit":5000,"remaining_today":2813,"minute_limit":60,"resets_at":"2026-10-02T00:00:00Z"}}}