{"id":2279853,"url":"https://alion.io/job/cisco-systems-senior-analog-layout-engineer","title":"Senior Analog Layout Engineer","company":{"id":90,"name":"Cisco Systems","domain":"cisco.com","url":"https://alion.io/company/cisco-systems","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":92,"open_postings":274,"ghost_share":0.015,"stale_share":0.449,"repost_share":0.066,"time_to_fill_p50_days":16,"computed_at":"2026-10-13T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Carlsbad, United States","Allentown, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":167700,"max":282000,"currency":"USD","period":"year","gross":null,"usd_annual":282000},"salary_estimate":null,"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"Linux","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Siemens Calibre","optional":true}],"status":"live","first_seen_at":"2026-10-07T00:00:00Z","employer_posted_date":"2026-10-07","last_verified_at":"2026-10-14T00:55:51Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"The application window is expected to close on: 01/18/2027Meet the Team\nThe Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.\nYour Impact\nAs a Senior Analog Layout Engineer on the Silicon One Optics team, you won’t just be drawing polygons-you’ll be architecting the physical blueprint for the world’s fastest optical interconnects. You will own block-to-top integration for next-gen 100G, 200G, and 400G per lambda architectures, pushing silicon past standard limits. From initial floorplanning to sign-off tapeout and silicon bring-up, your physical design decisions will directly power the future of global AI and data center infrastructure.\nPower Next-Gen Optics: Directly build and optimize complex analog and mixed-signal layouts for groundbreaking 100G-400G/lambda optical solutions.\nOwn the Silicon Lifecycle: Drive full-flow execution from concept and floorplanning through post-layout extraction, sign-off, tapeout, and post-silicon bring-up.\nSolve High-Speed Challenges: Master complex parasitic, signal integrity, and thermal tradeoffs alongside world-class circuit design, packaging, and CAD teams.\nSet the Standard: Shape design methodologies, mentor rising engineering talent, and raise the bar for physical execution across the group.\nMinimum Qualifications\nBachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience\nPrior experience supporting block-level layout efforts through tapeout\nPrior experience in physical verification and custom layout design, specifically with custom analog layout experience in FINFET 7nm, 5nm, or 3nm\nPrior experience with Cadence Virtuoso or similar custom layout tools\nPreferred Qualifications\nAnalog & Custom Layout Design: Prior experience in device-level layout techniques (matching, symmetry, shielding, common-centroid, interdigitation, guard rings, isolation structures) and critical design concepts including parasitic control, thermal management, and signal integrity. Custom analog experience in TSMC 2nm or below is a plus.\nEDA Tools & Signoff Flows: Prior experience with EDA tools like Cadence Virtuoso and Calibre (or equivalent) in a Linux environment, with a strong command of physical signoff flows including DRC, LVS, ERC, parasitic extraction, and EM/IR analysis.\nTapeout & Automation: Prior experience with ASIC/SoC tapeout processes and scripting capabilities (Python, Perl, or TCL) for layout automation.\n Collaboration: Prior experience working with cross-functional teams across multi-location teams.\nWhy Cisco?\nAt Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.\nFueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.\nWe are Cisco, and our power starts with you.\nMessage to applicants applying to work in the U.S. and/or Canada:\nThe starting salary range posted for this position is $149,100.00 to $218,100.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.\nU.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.\nU.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:\n10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees\n\n1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco\n\nNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees\n\nExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)\n\n80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next\n\nAdditional paid time away may be requested to deal with critical or emergency issues for family members\n\nOptional 10 paid days per full calendar year to volunteer\n\nFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.\nEmployees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:\n.75% of incentive target for each 1% of revenue attainment up to 50% of quota;\n\n1.5% of incentive target for each 1% of attainment between 50% and 75%;\n\n1% of incentive target for each 1% of attainment between 75% and 100%; and\n\nOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.\n\nFor non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.\nThe applicable full salary ranges for this position, by specific state, are listed below:\nNew York City Metro Area:\n$167,700.00 - $282,000.00Non-Metro New York state & Washington state:\n$149,100.00 - $250,900.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.\n** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.","description_format":"text","description_chars":7618,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Annual bonuses","Equity","Life insurance","Parental leave","Restricted stock units","Vision insurance"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Cybersecurity","Government","Endpoint Security","Observability & APM"],"lifecycle":[{"event":"open","at":"2026-10-11T11:07:32Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 1,384 · green card filings: 608","filings_12m":1384,"filings_prev_12m":1364,"green_card_filings_12m":608,"median_offered_wage_usd":152500,"route":null,"cap_exempt":false,"checked_at":"2026-10-03T21:08:04+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":91}],"liveness":{"score":73,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.81,"p_room":0.9,"age_days":6,"expected_fill_days":16,"reasons":["conf:3","win:mid","comp:brand"],"computed_at":"2026-10-13T05:45:00Z"},"pay":{"stated_usd_annual":282000,"is_top_pay":true},"html_url":"https://alion.io/job/cisco-systems-senior-analog-layout-engineer","json_url":"https://alion.io/job/cisco-systems-senior-analog-layout-engineer.json","meta":{"generated_at":"2026-10-14T02:55:23Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4487,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-15T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":90},"rest":"https://alion.io/mcp/rest/get_company?id=90"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcisco-systems-senior-analog-layout-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcisco-systems-senior-analog-layout-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcisco-systems-senior-analog-layout-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/cisco-systems-senior-analog-layout-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcisco-systems-senior-analog-layout-engineer"}]}