{"id":2102134,"url":"https://alion.io/job/clera-senior-silicon-engineer-2","title":"Senior Silicon Engineer","company":{"id":2706,"name":"Clera","domain":"getclera.com","url":"https://alion.io/company/clera","size_band":"11-50","is_staffing_agency":true,"employer_type":"agency","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"B","score":80,"open_postings":30,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":6,"computed_at":"2026-10-13T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Francisco, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":200000,"max":300000,"currency":"USD","period":"year","gross":null,"usd_annual":300000},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cocotb","optional":false},{"name":"Formal Verification","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-08T17:17:52Z","employer_posted_date":"2026-10-08","last_verified_at":"2026-10-14T00:17:03Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"About the Role\nLead silicon design for an AI accelerator, guiding development from FPGA prototype through ASIC tapeout and bring-up. As a founding member of a small silicon team, you will set technical direction and collaborate with PCB, interconnect, software, and systems teams to deliver the accelerator.\nWhat You'll Do\nDevelop and optimize FPGA prototypes, taking designs from specification to working hardware.\n\nDesign and review synthesizable RTL for the first ASIC, with a focus on clean microarchitecture.\n\nBuild and maintain lint, simulation, synthesis, timing, and verification flows for rapid iteration and tapeout readiness.\n\nMake architecture decisions across compute datapaths, memory systems, on-chip interconnect, and control logic.\n\nDrive design through tapeout, bring-up, and delivery milestones.\n\nHelp grow and mentor the silicon team.\n\nWhat We're Looking For\nAt least 8 years of experience in digital design or silicon engineering, building RTL, FPGA prototypes, or ASICs.\n\nExperience shipping synthesizable SystemVerilog or Verilog and taking FPGA designs through synthesis, place-and-route, and deployment to working hardware.\n\nStrong digital design fundamentals, including pipelining, clocks, resets, latency, throughput, and microarchitecture.\n\nExperience designing compute datapaths and memory systems with bandwidth and latency constraints in mind.\n\nFamiliarity with simulation, linting, synthesis, SDC constraints, timing closure, and CDC verification.\n\nExperience automating hardware flows with Python, Tcl, Make, Nix, or similar tools.\n\nBackground in AI accelerators or low-level AI kernels. Tapeout, high-speed interface, formal verification, UVM, cocotb, firmware, or systems-level hardware validation experience is also valuable.\n\nCompensation & Benefits\nSalary range: $200,000 to $300,000 annually. Visa sponsorship is available.\nLocation\nOn-site, full-time in San Francisco, United States. This role is not remote or hybrid.","description_format":"text","description_chars":1958,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-10-08T18:59:16Z"}],"visa":[],"liveness":{"score":24,"band":"cold","label":"Long shot","p_open":1,"p_active":0.317,"p_room":0.75,"age_days":4,"expected_fill_days":6,"reasons":["conf:0","agency","stale_co","velocity","win:late","comp:brand"],"computed_at":"2026-10-13T05:45:00Z"},"pay":{"stated_usd_annual":300000,"is_top_pay":true},"html_url":"https://alion.io/job/clera-senior-silicon-engineer-2","json_url":"https://alion.io/job/clera-senior-silicon-engineer-2.json","meta":{"generated_at":"2026-10-14T03:31:05Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":5529,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-15T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2706},"rest":"https://alion.io/mcp/rest/get_company?id=2706"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fclera-senior-silicon-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fclera-senior-silicon-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fclera-senior-silicon-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/clera-senior-silicon-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fclera-senior-silicon-engineer-2"}]}