{"id":1374484,"url":"https://alion.io/job/clock-edge-technologies-senior-verification-engineer","title":"Senior Verification Engineer","company":{"id":3806698,"name":"CLOCK EDGE TECHNOLOGIES","domain":"clkedge.com","url":"https://alion.io/company/clock-edge-technologies","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":17000,"max_usd":42000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":13},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-09-28T04:21:39Z","employer_posted_date":null,"last_verified_at":"2026-09-28T04:21:39Z","board_verified":false,"closed_at":null,"days_open":5,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":5},"description":"Qualifications : \n\nBachelor's or Master's degree in Electrical Engineering or a related field.\n\nRequired Skills and Experience : \n\n- 8+ years of experience in FPGA/ASIC functional verification with strong focus on C-based or embedded software-driven pre-silicon verification.\n\n- Experience with RISC-V, ARM-based SoCs, or embedded CPU verification.\n\n- Hands-on experience developing C/C++ testcases and verification frameworks for FPGA/SoC verification.\n\n- Strong understanding of FPGA architectures, SoC subsystems, memory architectures, interrupts, DMA, boot flows, and embedded processors.\n\n- Strong scripting skills in Python, Shell, Perl, and TCL.\n\n- Experience with coverage-driven and assertion-based verification methodologies.\n\n- Experience developing constrained-random and directed simulation testcases using System Verilog/UVM; knowledge of C-based testcase development is a plus.\n\n- Solid understanding of IC chip design, development flows, and verification methodologies.\n\n- Proven ability to develop verification plans, build robust UVM testbenches, define functional coverage models, execute regressions, analyze coverage gaps, and drive closure against verification goals.\n\n- Strong analytical, debugging, and problem-solving skills.\n\n- Excellent written and verbal communication skills in English.\n\nSkills\nFPGA, ASIC, System Verilog, UVM, Verification, C, C++, Functional Verification, SoC, ARM","description_format":"text","description_chars":1412,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Hardware","IoT Platforms & Solutions","IT Training & Certification","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-09-28T06:01:22Z"}],"liveness":{"score":82,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.819,"p_room":1,"age_days":4,"expected_fill_days":24,"reasons":["seen:4","win:early"],"computed_at":"2026-10-02T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/clock-edge-technologies-senior-verification-engineer","json_url":"https://alion.io/job/clock-edge-technologies-senior-verification-engineer.json","meta":{"generated_at":"2026-10-03T04:22:22Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":4605,"day_limit":5000,"remaining_today":395,"minute_limit":60,"resets_at":"2026-10-04T00:00:00Z"}}}