{"id":2045122,"url":"https://alion.io/job/coherent-layout-engineering-lead","title":"Layout Engineering Lead","company":{"id":58506,"name":"Coherent","domain":"coherent.com","url":"https://alion.io/company/coherent-com","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"A","score":86,"open_postings":31,"ghost_share":0,"stale_share":0.742,"repost_share":0,"time_to_fill_p50_days":3,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sherman, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":140000,"max_usd":266000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":576},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"KLayout","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-10-07T18:36:55Z","employer_posted_date":"2026-10-07","last_verified_at":"2026-10-16T14:55:02Z","board_verified":true,"closed_at":null,"days_open":8,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":8},"description":"Primary Duties & Responsibilities\nLead physical layout development for III-V semiconductor laser products including VCSELs, DFB lasers, photonic devices, and related optoelectronic technologies.\nOwn layout architecture, mask design, and mask data preparation from concept through production release.\nDevelop, maintain, and improve design rule methodologies, verification flows, and layout standards to ensure manufacturable and robust designs.\nDesign and implement process monitor structures, test patterns, and characterization vehicles to support process development, process control, yield improvement, and reliability monitoring.\nDevelop automated Design Rule Check (DRC), Layout Versus Schematic (LVS), verification, and data analysis solutions using scripting and programming languages such as Python, Tcl, Perl, or equivalent.\nChampion layout automation initiatives to improve design productivity, consistency, quality, and cycle time.\nCollaborate closely with process integration, device engineering, epitaxy, manufacturing, and product engineering teams to ensure layouts meet design, process, reliability, and manufacturing requirements.\nDrive layout reviews and cross-functional design reviews throughout product development and qualification phases.\nSupport root cause investigations and failure analysis activities by evaluating potential layout-related issues and implementing corrective actions.\nEstablish and maintain layout design guidelines, libraries, reusable cells, and best practices.\nCoordinate mask revisions and change management activities while ensuring configuration control and documentation accuracy.\nLead multifunctional teams in resolving layout, manufacturability, and process integration challenges.\nMentor layout engineering techs and provide technical guidance on layout methodologies, DRC compliance, automation, and semiconductor process interactions.\nEducation & Experience\nBachelor's, Master's, or Ph.D. degree in Electrical Engineering, Physics, Materials Science, Optical Engineering, or a related technical field.\nMinimum 5 years of semiconductor layout design experience required.\nMinimum 3 years of direct experience with III-V optoelectronic devices such as VCSELs, DFB lasers, edge-emitting lasers, photonic integrated circuits (PICs), or similar technologies preferred.\nDemonstrated experience developing production mask sets and managing layout releases for semiconductor products.\nExperience designing process control monitor (PCM) structures, test keys, and process characterization patterns.\nStrong understanding of semiconductor fabrication processes and how process interactions impact physical layout and device performance.\nSkills\nExpert-level experience with semiconductor layout tools, preferably Silvaco layout solutions. Experience with equivalent EDA platforms such as Cadence, KLayout, Synopsys, Mentor Graphics/Siemens EDA, or similar tools will also be considered.\nStrong understanding of physical layout design principles, mask design, DRC, LVS, and semiconductor manufacturing constraints.Proficiency in programming and automation using Python, Tcl, Perl, C++, or similar languages.\n\nExperience developing custom verification tools, automated design rule checks, layout generators, or workflow automation solutions.\nHands-on experience with VCSEL, DFB laser, photonic integrated circuit (PIC), or related optoelectronic device layouts.\nStrong knowledge of lithography, etch, metallization, dielectric deposition, implantation, and other semiconductor fabrication processes.\nFamiliarity with semiconductor manufacturing operations, process control methodologies, and change management systems.\nStrong analytical and problem-solving skills with the ability to evaluate complex layout-process interactions.\nExcellent communication and leadership skills with demonstrated ability to influence and drive actions across multifunctional engineering teams.\nSelf-motivated and capable of leading projects in a fast-paced product development environment.\nExperience with statistical analysis tools such as JMP, Minitab, or equivalent is a plus.\nWorking Conditions\nNormal office environment\nPhysical Requirements\nWork in a class 100/1000 clean room for extended periods\n\nWear full cleanroom attire (smock, mask, etc.)\n\nWork with and/or around chemicals (such as solids and acids)\n\nStand for up to 4 hours at a time\n\nLift up to 16-30 Pounds\n\nPush/Pull up to 16-30 pounds\n\nSit for up to 4 hours at a time\n\nSafety Requirements\nAll employees are required to follow the site EHS procedures and Coherent Corp. Corporate EHS standards.\nQuality and Environmental Responsibilities\nDepending on location, this position may be responsible for the execution and maintenance of the ISO 9000, 9001, 14001 and/or other applicable standards that may apply to the relevant roles and responsibilities within the Quality Management System and Environmental Management System.\nCulture Commitment\nEnsure adherence to company’s values (ICARE) in all aspects of your position at Coherent Corp.:\nIntegrity - Create an Environment of Trust\nCollaboration - Innovate Through the Sharing of Ideas\nAccountability - Own the Process and the Outcome\nRespect - Recognize the Value in Everyone\nEnthusiasm - Find a Sense of Purpose in Work\nCoherent Corp. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.\nIf you need assistance or an accommodation due to a disability, you may contact us at .","description_format":"text","description_chars":5701,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Consumer Electronics","Telecommunications","Optical Communications","Optics & Photonic Components"],"lifecycle":[{"event":"open","at":"2026-10-07T19:17:05Z"}],"visa":[],"liveness":{"score":12,"band":"cold","label":"Long shot","p_open":1,"p_active":0.337,"p_room":0.35,"age_days":8,"expected_fill_days":3,"reasons":["conf:2","stale_co","velocity","win:tail","comp:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/coherent-layout-engineering-lead","json_url":"https://alion.io/job/coherent-layout-engineering-lead.json","meta":{"generated_at":"2026-10-16T14:56:10Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":14694,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":58506},"rest":"https://alion.io/mcp/rest/get_company?id=58506"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcoherent-layout-engineering-lead"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcoherent-layout-engineering-lead"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcoherent-layout-engineering-lead"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/coherent-layout-engineering-lead\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcoherent-layout-engineering-lead"}]}