{"id":1872422,"url":"https://alion.io/job/congatec-senior-engineer-pcb-layout-penang-malaysia","title":"Senior Engineer - PCB Layout / Penang, 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Allegro","optional":false}],"status":"live","first_seen_at":"2026-09-27T02:00:00Z","employer_posted_date":"2026-09-27","last_verified_at":"2026-11-03T10:05:14Z","board_verified":true,"closed_at":null,"days_open":37,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":37},"description":"Your tasks:\nPCB design based on specification and complementary information according to the project manager and development manager \nCollaboration with the project leader and group leader on development time estimations for the new projects \nDefinition of PCB geometry (outline, mounting holes) \nCreating library elements (PCB footprint) \nComponents placement (layout of PCB components) \nProvision of information for mechanical construction (girders, panels, height restrictions) \nCooperation with the design of cooling solutions \nDefine PCB design/ routing strategy and setting geometrical-electrical constraints \nHigh speed and multi-layer embedded PCB layout according to the design rules, and meets the DFM requirement \nTuning the signal quality to meet signal integrity requirement \nSimulate layout work using signal integrity and power integrity tools \nGenerate output data and production documentation \nYour profile:\nBachelor's Degree in Electronic Engineering or equivalent. \nExperience in high speed multi-layer PCB layout and defining PCB layout design rules. \nFamiliar with DFM (Design for manufacturing) and DFT (Design for Testing) requirements. \nExperience in motherboard/ module layout will be an advantage. \nExperience in power integrity and signal integrity simulation will be an advantage. \nFamiliar with standards-based design such as PCIe, USB, DP will be an advantage. \nFamiliar with Cadence Allegro will be an advantage. \nPositive attitude & good team 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