{"id":3110614,"url":"https://alion.io/job/credo-senior-staff-asic-design-engineer","title":"Senior Staff ASIC Design Engineer","company":{"id":1958633,"name":"Credo","domain":"credosemi.com","url":"https://alion.io/company/credosemi","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"HiBob","truth_index":{"grade":"A","score":98,"open_postings":13,"ghost_share":0,"stale_share":0.077,"repost_share":0,"time_to_fill_p50_days":55,"computed_at":"2026-11-01T06:10:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":160000,"max":230000,"currency":"USD","period":"year","gross":null,"usd_annual":230000},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"closed","first_seen_at":"2026-10-22T20:22:43Z","employer_posted_date":"2026-10-22","last_verified_at":"2026-10-27T19:30:07Z","board_verified":false,"closed_at":"2026-10-27T19:30:07Z","days_open":4,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":4},"description":"As a Senior Staff ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will collaborate with PD, DFT, STA, and integration teams to ensure successful tape-outs and work closely with system teams for chip bring-up and validation. \nBase salary range is $160,000 - $230,000 a year. The base salary offer will depend on factors such as education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.\n\nWhy Credo\n\nPurpose: We invest in what matters. From meaningful-future shaping projects to competitive compensation, we empower you to grow your career while making a lasting impact.\nPeople: Connection starts within. We collaborate, celebrate wins, and create an environment where everyone can do their best work.\n Possibilities: Our belief shapes what’s next. Our technology powers the most reliable and energy-efficient connections around the world - and our team powers new products and markets that come next.\nResponsibilities\nDesign, implement, and debug complex logic blocks and integrate IPs from internal and external vendors.\nSupport front-end integration tasks: Lint, CDC, synthesis, DFT, and ECO.\nParticipate in design and code reviews to ensure quality.\nDevelop testbenches and run RTL and gate-level simulations.\nPartner with verification, DFT, physical design, software, firmware, and systems teams on tape-outs and chip bring-up, validation, and debug.\nQualifications\nBasic QualificationsBS/MS in Electrical Engineering or relevant field with ten or more years of ASIC design experience and a proven record of production tape-outs.\nStrong digital logic design skills, including complex synchronous/asynchronous interfaces, and proficiency in Verilog/SystemVerilog RTL.\nExperience with high-speed Serdes design and familiarity with Ethernet (802.3) standards.\nKnowledge of synthesis and static timing analysis.\nExperience with testbench/test case development (UVM familiarity), gate-level simulation, chip bring-up, and validation.\nPreferred Qualifications Scripting expertise in Python, Tcl, Perl, and/or Shell.\nFamiliarity with DFT methodology and the physical design flow.\nKnowledge of PCIe, UALink, or AXI/CHI interfaces.\nHands-on STA and timing closure experience. \nAbout Credo\nCredo’s mission is to transform connectivity at scale through fast, reliable, and energy-efficient system solutions. Our high-speed copper and optical interconnect products deliver industry-leading power and performance at up to 1.6T to meet the ever-expanding data infrastructure demands of AI. \nOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Credo innovations enable our customers to connect the systems that connect the world.\n\nCredo is committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, gender identity, sexual orientation, pregnancy, marital status, national origin, ethnicity, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email ","description_format":"text","description_chars":3603,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Cybersecurity","Hardware"],"lifecycle":[{"event":"open","at":"2026-10-22T20:35:46Z"},{"event":"close","at":"2026-10-27T19:30:07Z"}],"visa":[],"liveness":null,"pay":{"stated_usd_annual":230000,"is_top_pay":false},"html_url":"https://alion.io/job/credo-senior-staff-asic-design-engineer","json_url":"https://alion.io/job/credo-senior-staff-asic-design-engineer.json","meta":{"generated_at":"2026-11-01T07:46:58Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":11976,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-02T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1958633},"rest":"https://alion.io/mcp/rest/get_company?id=1958633"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fcredo-senior-staff-asic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fcredo-senior-staff-asic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fcredo-senior-staff-asic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/credo-senior-staff-asic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fcredo-senior-staff-asic-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3110614}},{"tool":"search_jobs","arguments":{"company":"credosemi.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3110614},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}