{"id":1280178,"url":"https://alion.io/job/cyclad-staff-hardware-design-engineer-soc-noc","title":"Staff Hardware Design Engineer – SoC / NoC","company":{"id":895,"name":"Cyclad","domain":"cyclad.eu","url":"https://alion.io/company/cyclad","size_band":"51-200","is_staffing_agency":true,"employer_type":"agency","is_intermediary":false,"listed_via":null,"ats_vendor":"Recruitify","truth_index":{"grade":"B","score":76,"open_postings":105,"ghost_share":0.4,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":41,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Kraków, Poland"],"countries":["PL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":61000,"max_usd":129000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":646},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Python","optional":false},{"name":"SystemC","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-25T11:52:34Z","employer_posted_date":"2026-09-25","last_verified_at":"2026-10-28T01:11:19Z","board_verified":true,"closed_at":null,"days_open":32,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":31},"description":"In Cyclad we work with top international IT companies in order to boost their potential in delivering outstanding, cutting edge technologies that shape the world of the future. Currently, we are looking for an experienced Staff Hardware Design Engineer to join an engineering organization developing advanced semiconductor technologies and configurable hardware IP solutions.\nThe team works on technologies that enable the integration and communication of complex System-on-Chip (SoC) architectures used across modern electronic products and high-performance computing platforms.\nProject information:\nLocation: Kraków (2 days from the office)\nRemuneration: 28 000 - 30 000 gross CoE\nProject languages: English\nKey Responsibilities:\nDesign and implement complex RTL blocks for configurable hardware IP, with particular attention to functionality, scalability, and performance.\nContribute to the definition of architecture and technical specifications for NoC and related components, while identifying opportunities for improvement.\nCreate advanced verification environments and establish suitable approaches for functional coverage and validation.\nAnalyze complex technical issues and develop effective solutions, while providing technical assistance to other engineers.\nCooperate closely with hardware, software, and verification teams to support successful integration of individual components into larger systems.\nHelp improve design and verification processes, methodologies, and engineering practices used by the team.\nParticipate in technical discussions involving customers and application engineering specialists when required.\nProduce clear documentation for complex hardware implementations and share technical knowledge with less experienced team members through mentoring and guidance.\nRequirements:\n8-12 years of professional experience in SoC, semiconductor IP, or NoC hardware development.\nStrong knowledge of coherent and non-coherent communication and interconnect technologies, including AMBA, AXI, ACE, PCIe, CXL, CHI, or comparable standards.\nSolid understanding of modern processor architectures, particularly ARM and/or RISC-V, as well as cache architectures and memory coherency.\nExtensive knowledge of the SoC/IP development lifecycle, covering requirements and architecture, RTL implementation, verification, synthesis, DFT, timing, and power constraints.\nStrong analytical, communication, and collaboration skills, with the ability to address complex hardware engineering problems.\nAdvanced knowledge of Verilog/SystemVerilog and experience with industry-standard simulation and synthesis environments, including tools from major EDA vendors.\nPractical programming experience with SystemC, C++, Python, and scripting languages commonly used in hardware development.\nAbility to work autonomously, take ownership of challenging technical topics, and develop new or improved engineering solutions.\nWillingness to travel to France for business trips.\nProfessional fluency in English, both written and spoken.\nMaster’s degree or equivalent in Electrical Engineering, Computer Science, Computer Engineering, or a related technical discipline.\nWe offer:\nPremium Lux Med medical and dental care package.\nMultisport card.\nLife insurance.\nMonthly lunch allowance of PLN 450.\nUnlimited paid time off.","description_format":"text","description_chars":3314,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":true},"security_clearance":false,"languages":[{"language":"English","level":"Advanced (C1)","optional":false}]},"benefits":["Life insurance"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident 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