{"id":2497620,"url":"https://alion.io/job/drivenets-senior-signal-integrity-engineer-3","title":"Senior Signal Integrity Engineer","company":{"id":1990259,"name":"DriveNets","domain":"drivenets.com","url":"https://alion.io/company/drivenets","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Comeet","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"remote","remote_scope":"stated_countries","remote_scope_basis":"board_field","remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Taipei, Taiwan"],"countries":["TW"],"hiring_countries":["TW"],"hiring_countries_total":1,"salary":null,"salary_estimate":{"min_usd":23000,"max_usd":52000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1655},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys SIwave","optional":false},{"name":"Synopsys HSPICE","optional":false}],"status":"live","first_seen_at":"2026-09-15T17:52:12Z","employer_posted_date":"2026-09-15","last_verified_at":"2026-10-15T08:49:37Z","board_verified":true,"closed_at":null,"days_open":29,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":29},"description":"Description\nSenior Signal Integrity Engineer\n#LI-Remote\nAbout Us:\nDriveNets is at the forefront of developing innovative solutions in high-speed electronics. Our cutting-edge technology serves the next generation of networking and communications, including Ethernet routers and high-performance platforms for the most demanding applications. We are committed to solving complex challenges and pushing the boundaries of what's possible in signal and power integrity.\nThe Role:\nWe are looking for an experienced Senior Signal Integrity Engineer to join our Hardware Engineering team. This role focuses on ensuring optimal signal integrity for high-speed interfaces, including Ethernet, PCIe, DDR5, and other next-generation technologies. As part of the team, you will be responsible for performing signal integrity analysis, developing signal integrity models, and ensuring electrical compliance for high-speed SERDES I/Os.\nResponsibilities:\nConduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces.\nDevelop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths.\nAnalyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and power delivery network (PDN) issues.\nCollaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards and high-speed design best practices.\nPerform time-domain and frequency-domain analysis, including loss, jitter, and eye-diagram analysis.\nUtilize EDA tools such as Ansys SIWAVE, HFSS, or similar for simulation and validation of signal integrity designs.\nWork closely with cross-functional teams to integrate signal integrity considerations into the overall hardware design process.\nDevelop behavioural models based on measured signal integrity data to inform future design and simulation work.\nConduct pre- and post-layout simulations and measurements for high-speed signal interfaces.\nRequirements\nBachelor's or Master’s degree in Electrical/Electronics Engineering with 10+ years of relevant experience.\nStrong understanding of electromagnetic (EM) concepts and transmission line theory.\nExtensive experience in signal integrity analysis for high-speed serial interfaces, including Ethernet, PCIe, and DDR5.\nProficiency in using EDA tools like Ansys SIWAVE, HFSS, or similar.\nHands-on expertise in time-domain and frequency-domain analysis, jitter, loss, and eye-diagram analysis.\nStrong background in HSPICE simulations and model development.\nExperience with PCB layout techniques for high-speed designs.\nExcellent communication skills and the ability to work effectively in a collaborative team environment.\nAdvantages:\nExperience with advanced simulation tools and techniques.\nExperience with high-speed interfaces such as 112Gbps PAM4 Ethernet, PCIe Gen5, and DDR5.\nIn-depth knowledge of high-speed PCB design and layout principles.\nFamiliarity with power integrity and power noise simulations.","description_format":"text","description_chars":3071,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Taiwan","iso":"TW","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Cybersecurity","Network Security","Internet Service Providers"],"lifecycle":[{"event":"open","at":"2026-10-14T05:14:13Z"}],"visa":[],"liveness":{"score":69,"band":"ok","label":"Likely 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