{"id":2022946,"url":"https://alion.io/job/e-space-soc-platform-engineer","title":"SoC Platform Engineer","company":{"id":2438005,"name":"E-Space","domain":"e-space.com","url":"https://alion.io/company/e-space-com","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Welcome to the Jungle","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Saratoga, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":150000,"max":220000,"currency":"USD","period":"year","gross":null,"usd_annual":220000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Formal Verification","optional":false},{"name":"Git","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-08-06T00:09:52Z","employer_posted_date":"2026-10-07","last_verified_at":"2026-10-08T23:39:22Z","board_verified":true,"closed_at":null,"days_open":64,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":64},"description":"Join our team as a SoC Platform Engineer, where you will take ownership of IP integration, system-level verification, and firmware development for our custom SoC. This hands-on role will have a broad impact across the hardware development cycle, from IP bring-up through full-chip validation. You will work at the intersection of hardware and software, defining testbenches, authoring test firmware, and implementing critical SoC features in silicon.\nMissions\nOwnership of IP integration, system-level verification, and firmware development for custom SoC.\nEvaluation, integration, and verification of IP blocks within the SoC, ensuring correct connectivity and interoperability.\nDefinition, implementation, and maintenance of system-level testbenches covering subsystem and full SoC verification scenarios.\nProfil recherché\n - Firmware Development: Ability to write bare-metal C firmware for hardware bring-up, feature validation, and test automation on embedded targets- SoC Architecture: Understanding of SoC subsystem partitioning, memory maps, interrupt routing, and hardware/software interfaces\n- Scripting: Proficiency in scripting languages such as Python, Tcl, Bash, and Makefiles for build flow automation and test infrastructure\n- Verification Methodologies: Experience with UVM or similar structured verification methodologies\n- Hardware Description Languages: Proficiency in RTL design and verification using SystemVerilog and/or VHDL\n- AMBA Interconnects: Strong knowledge of AMBA protocols (AXI, AHB, APB) and their application in SoC integration\n- Debugging Tools: Experience with simulation tools (e.g., VCS, Questa, Xcelium) and hardware debug environments (JTAG, logic analyzers, oscilloscopes)\n- Version Control: Expertise with Git or similar version control systems\n- Experience with ARM Corstone reference designs and Cortex-M or Cortex-A processor integration\n- Experience with formal verification or property checking tools\n- Knowledge of embedded security concepts, including cryptographic algorithms and Post-Quantum Cryptography (PQC)\n- Familiarity with Cortex-A and Cortex-M class processors, NPU processors, and DSP processors\n- Familiarity with FPGA emulation platforms for pre-silicon validation\n- Knowledge of 3GPP network protocols as they relate to SoC modem or connectivity subsystem integration\n- Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field\n- Experience with low-power SoC design and power intent methodologies (UPF/CPF)\n- Familiarity with TrustedFirmware-M, MCUboot, or PSA-certified security architectures","description_format":"text","description_chars":2608,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response"],"lifecycle":[{"event":"open","at":"2026-10-07T13:23:53Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long 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