{"id":2389885,"url":"https://alion.io/job/edgecortix-india-physical-design-engineer","title":"[India] Physical Design Engineer","company":{"id":48043,"name":"EdgeCortix","domain":"edgecortix.com","url":"https://alion.io/company/edgecortix","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"BambooHR","truth_index":{"grade":"D","score":51,"open_postings":21,"ghost_share":0.81,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Computer Vision","optional":false},{"name":"Python","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Synopsys PrimeTime","optional":false}],"status":"live","first_seen_at":"2025-01-27T00:00:00Z","employer_posted_date":"2025-01-27","last_verified_at":"2026-11-09T02:13:40Z","board_verified":true,"closed_at":null,"days_open":651,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":650},"description":"Introduction\nWe are seeking an experienced Physical Design Engineerto join our team developing next-generation AI acceleration SoCs and chiplets at EdgeCortix. In this role, you will play a key part in driving synthesis, timing closure, and design optimization in close collaboration with our RTL, architecture, and external implementation partners. This is an exciting opportunity to contribute to cutting-edge silicon development that powers advanced AI systems at the edge.\nThe Team\nAs a team, we are working to define and solve the hardest problems in AI including computer vision, speech, and natural language, geared towards real-time capabilities on small to medium-form factor devices. We originated out of multiple years of research, as such at our core we value learning, intellectual curiosity, and self-starters. We have the ambitious goal of enabling cloud-level performance with significantly better energy efficiency for AI inference at the edge.\nAbout EdgeCortix\nEdgeCortix is a deep-tech, fabless semiconductor startup revolutionizing edge computing with artificial intelligence and high-efficiency system-on-chip (SoC) design. Founded on years of advanced research, our proprietary hardware-software co-design methodology and Dynamic Neural Accelerator® AI processor IP are reshaping the AI hardware space. Headquartered in Tokyo, Japan, we also operate in Singapore, the United States (California and Virginia), and India.\nYour Role and Responsibilities\nAs a Physical Design Engineer, you will contribute to the implementation of our next-generation AI acceleration SoCs and chiplets. As part of small internal PD team, you will be responsible for driving key aspects of the front-end synthesis experiments to determine optimal PPA operating point and taking the IPs through Place and Route flow through close collaboration with RTL design and architecture teams. The sign-off activities and regular P&R progress has to be closely collaborated with our external implementation partners.\nThis role emphasizes synthesis, timing analysis, floorplanning, power optimization, and design closure, with a strong focus on communication and coordination across internal and external teams.\nKey Responsibilities\nDrive and maintain RTL-to-GDSII flow, focusing on synthesis, STA, and design closure. Knowledge of DVFS, MMMC is important\nStrong Synthesis knowledge essential. Able to conduct multiple experiments at Synthesis and take it to P&R and provide feedback to IP teams\nDefine floorplans and block partitioning strategies for hierarchical designs.\nCoordinate with external vendors for backend P&R execution; review their outputs for quality and correctness.\nAnalyze timing paths and lead STA closure across PVT corners and operating modes.\nDevelop and optimize physical constraints (SDC, TCL) and run equivalence checks.\nPlacement analysis, congestion analysis, Clock Tree implementation experience needed\nEvaluate standard cell libraries and implementation methodologies to improve PPA.\nImplement low-power design strategies using UPF (Unified Power Format).\nReview power grid planning and sign-off reports (IR-drop, EM).\nDrive ECO implementation based on RTL changes or timing requirements.\nCollaborate with internal RTL and architecture teams to improve logic and system-level PPA.\nParticipate in early feasibility studies and contribute to PPA projections.\nMaintain and improve internal automation scripts and flows.\nMinimum Qualifications\nBachelor's degree in Electrical Engineering, Computer Engineering, or related field.\n5+ years of experience in physical design of SoCs with a focus on synthesis and timing.\nProficiency in STA and synthesis tools (e.g., Primetime, Design Compiler, Genus).\nFamiliarity with backend flows and interaction with P&R teams (internal or external).\nGood scripting skills (TCL, Python, Shell).\nExperience working with advanced technology nodes ( 12nm and below).\nPreferred Qualifications\nMaster’s degree in relevant field.\n8-10+ years of experience in physical design or chip implementation.\nPrior experience coordinating with remote backend implementation teams.\nExperience in chiplet architecture or hierarchical SoC designs.\nUnderstanding of sign-off checks (LVS, DRC), IR-drop, crosstalk, and EM analysis.\nProficiency in UPF-based low-power flows and ECO handling.\nStrong communication and project coordination skills.\nWhat’s in it for you?\nMake a difference: you will have the opportunity to join a well-funded fabless AI semiconductor startup that is disrupting the AI software and hardware co-design space. Be an integral part of its growth and momentum.\nLocation - Hyderabad\nBenefits and Perks\nHighly competitive salary and stock options\nFlex work time\nTop-tier employee benefits","description_format":"text","description_chars":4736,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Stock options"],"hiring_locations":[{"name":"India","iso":"IN","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Edge AI","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-12T20:56:16Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.188,"p_room":0.28,"age_days":650,"expected_fill_days":36,"reasons":["conf:0","stale_co","ghost","win:tail","crowd:"],"computed_at":"2026-11-08T05:47:12Z"},"pay":null,"html_url":"https://alion.io/job/edgecortix-india-physical-design-engineer","json_url":"https://alion.io/job/edgecortix-india-physical-design-engineer.json","meta":{"generated_at":"2026-11-09T03:33:38Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1847,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-10T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":48043},"rest":"https://alion.io/mcp/rest/get_company?id=48043"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fedgecortix-india-physical-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fedgecortix-india-physical-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fedgecortix-india-physical-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/edgecortix-india-physical-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fedgecortix-india-physical-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2389885}},{"tool":"search_jobs","arguments":{"company":"edgecortix.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2389885},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}