{"id":2389913,"url":"https://alion.io/job/edgecortix-india-senior-ucie-verification-engineer","title":"[India] Senior UCIe Verification Engineer","company":{"id":48043,"name":"EdgeCortix","domain":"edgecortix.com","url":"https://alion.io/company/edgecortix","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"BambooHR","truth_index":{"grade":"D","score":53,"open_postings":19,"ghost_share":0.789,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-30T05:48:23Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":16000,"max_usd":42000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":6,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"CI/CD","optional":false},{"name":"Computer Vision","optional":false},{"name":"Formal Verification","optional":false},{"name":"Git","optional":false},{"name":"GitLab CI","optional":false},{"name":"Jenkins","optional":false},{"name":"Machine Learning","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-08-04T00:00:00Z","employer_posted_date":"2026-08-04","last_verified_at":"2026-10-30T17:06:13Z","board_verified":true,"closed_at":null,"days_open":87,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":86},"description":"Introduction\nWe are looking for a Senior UCIe Verification Engineerwith strong experience in SystemVerilog/UVM-based verification of high-speed interconnects and SoC subsystems. The ideal candidate should have hands-on experience in verifying UCIe (Universal Chiplet Interconnect Express) IP and should have contributed to at least 1-2 successful SoC tape-outs. The role involves developing reusable verification environments, protocol compliance verification, subsystem/SoC integration, and driving verification closure.\nAbout Edgecortix\nAt Edgecortix we are a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design. Originating from multiple years of research, our unique AI hardware & software co-design principle and the Dynamic Neural Accelerator ® AI processor IP are geared towards positively disrupting the rapidly growing artificial intelligence edge hardware space and bring the power of AI and machine learning to all kinds of devices. Our operations are headquartered in Tokyo, Japan, with offices in Singapore, Virginia, California in the US. In addition, we are starting a new Design Center in India, located in Hyderabad.\nThe Team\nAs an engineering driven company we are working to define and solve the hardest problems in AI including computer vision, speech, and natural language, geared towards real-time capabilities on small to medium form factor devices. We originated out of multiple years of research, as such at our core we value learning, intellectual curiosity, and self-starters. We have the ambitious goal of enabling cloud-level performance with significantly better energy-efficiency for AI inference at the edge.\nYour Role and Responsibilities:\nDevelop and execute comprehensive verification plans for UCIe IP, subsystems, and SoC integration.\nBuild reusable SystemVerilog/UVM verification environments from scratch.\nDevelop constrained-random and directed test scenarios to verify UCIe functionality and protocol compliance.\nVerify UCIe protocol features, including:Link initialization and training\nSideband communication\nAdapter layer\nProtocol layer\nData transfer and flow control\nLink power management\nError detection and recovery\nReset and initialization sequences\n\nVerify interoperability between UCIe and upper-layer protocols such as PCIe, CXL, or streaming interfaces.\nDevelop UVM agents, scoreboards, monitors, protocol checkers, and functional coverage models.\nWrite and debug SystemVerilog Assertions (SVA) for protocol compliance and interface checks.\nPerform coverage analysis and drive functional and code coverage closure.\nDebug RTL, protocol, and testbench issues using simulation and waveform analysis.\nSupport gate-level simulations, regression execution, and silicon bring-up activities.\nCollaborate closely with architecture, RTL, DFT, firmware, physical design, and validation teams throughout the product development cycle.\nDesired Qualifications:\n6-12 years of experience in functional verification using SystemVerilog and UVM.\nStrong experience in developing complete UVM verification environments from scratch.\nGood understanding of UCIe architecture and protocol.\nExperience verifying high-speed serial interfaces or chiplet interconnects.\nStrong understanding of:AXI4\nHigh-speed protocol verification\nClock domain crossings (CDC)\nReset domain crossings (RDC)\nProtocol compliance verification\nExperience with constrained-random, assertion-based, and coverage-driven verification methodologies.\n\nStrong experience writing SystemVerilog Assertions (SVA).\nExperience with gate-level simulation and timing-aware verification.\nExcellent RTL and protocol debugging skills.\nExperience in verifying die-to-die interfaces or chiplet-based architectures.\nExperience with subsystem and SoC-level verification.\nExperience with emulator-based verification platforms.\nExposure to Formal Verification techniques.\nFamiliarity with Continuous Integration (CI/CD) tools such as Jenkins or GitLab CI.\nExperience with scripting languages such as Python, Perl, or Tcl.\nExperience with version control systems such as Git.\nSoC ExperienceHands-on experience in 1-2 successful SoC tape-outs.\nExperience integrating UCIe subsystems into complex SoCs.\nExposure to boot flows, clock/reset architecture, power management, and chiplet integration.\n• Experience collaborating with firmware and post-silicon validation teams during bring-up and debug.\n\nWhat’s in it for you?\nMake a difference: you will have the opportunity to join a well-funded fabless AI semiconductor startup that is disrupting the AI software and hardware co-design space. Be an integral part of its growth and momentum.\nBenefits and Perks\nHighly competitive salary and stock options\nFlex work time\nTop-tier employee benefits","description_format":"text","description_chars":4794,"description_truncated":false,"requirements":{"experience_years_min":6,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Stock options"],"hiring_locations":[{"name":"India","iso":"IN","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Edge AI","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-12T20:56:16Z"}],"visa":[],"liveness":{"score":13,"band":"cold","label":"Long shot","p_open":1,"p_active":0.366,"p_room":0.35,"age_days":87,"expected_fill_days":36,"reasons":["conf:4","stale_co","win:tail"],"computed_at":"2026-10-30T05:48:23Z"},"pay":null,"html_url":"https://alion.io/job/edgecortix-india-senior-ucie-verification-engineer","json_url":"https://alion.io/job/edgecortix-india-senior-ucie-verification-engineer.json","meta":{"generated_at":"2026-10-30T18:30:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":7550,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-31T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":48043},"rest":"https://alion.io/mcp/rest/get_company?id=48043"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fedgecortix-india-senior-ucie-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fedgecortix-india-senior-ucie-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fedgecortix-india-senior-ucie-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/edgecortix-india-senior-ucie-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fedgecortix-india-senior-ucie-verification-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2389913}},{"tool":"search_jobs","arguments":{"company":"edgecortix.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2389913},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}