{"id":2389860,"url":"https://alion.io/job/edgecortix-japan-design-verification-engineer","title":"[Japan] Design Verification Engineer","company":{"id":48043,"name":"EdgeCortix","domain":"edgecortix.com","url":"https://alion.io/company/edgecortix","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"BambooHR","truth_index":{"grade":"D","score":53,"open_postings":19,"ghost_share":0.789,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Kawasaki, Japan"],"countries":["JP"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":47000,"max_usd":107000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1936},"experience_years_min":6,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Cadence Conformal","optional":false},{"name":"Cadence Genus","optional":false},{"name":"CI/CD","optional":false},{"name":"CircleCI","optional":false},{"name":"Computer Vision","optional":false},{"name":"GitLab CI","optional":false},{"name":"Jenkins","optional":false},{"name":"Machine Learning","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2025-01-27T00:00:00Z","employer_posted_date":"2025-01-27","last_verified_at":"2026-10-27T04:24:45Z","board_verified":true,"closed_at":null,"days_open":638,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":638},"description":"Introduction\nWe are looking for an experienced and motivated DesignVerification Engineerto join our Artificial Intelligence Hardware Accelerator Team at EdgeCortix. In this role, you will collaborate closely with our design and architecture teams to build and enhance advanced verification environments for our next-generation AI SoCs. This is an excellent opportunity to contribute to innovative hardware-software co-design in a fast-growing deep-tech startup that is redefining the future of AI at the edge.\nAbout Edgecortix\nAt Edgecortix we are a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design. Originating from multiple years of research, our unique AI hardware & software co-design principle and the Dynamic Neural Accelerator ® AI processor IP are geared towards positively disrupting the rapidly growing artificial intelligence edge hardware space and bring the power of AI and machine learning to all kinds of devices. Our operations are headquartered in Tokyo, Japan, with offices in Singapore, Virginia, and California in the US.\nThe Team\nAs an engineering driven company we are working to define and solve the hardest problems in AI including computer vision, speech, and natural language, geared towards real-time capabilities on small to medium form factor devices. We originated out of multiple years of research, as such at our core we value learning, intellectual curiosity, and self-starters. We have the ambitious goal of enabling cloud-level performance with significantly better energy-efficiency for AI inference at the edge.\nYour Role and Responsibilities:\nThis role is part of the EdgeCortix Artificial Intelligence Hardware Accelerator Team\nWorking closely with the design architecture team and contributing to IP, performance and SoC related verification.\nPlaying a key role in development of verification infrastructure, which would involve VIPs, different memory models, monitors, etc.\nWriting configurable testbenches in SystemVerilog/UVM and testbench automation.\nWriting System verilog assertions and maintaining them.\nWriting functional coverage and overall functional and code coverage analysis.\nWorking on ASIC power estimation and power-aware verification.\nAutomating tool flows and creation of result reports.\nDesired Qualifications:\n6-7 years of experience in functional verification of blocks/systems using SystemVerilog/UVM.\nStrong understanding of verification techniques including assertions, metric-driven and coverage-driven verification.\nExperience in developing full verification infrastructure from scratch.\nExperience with verification of systems which involve high-speed buses such as AXI4.\nExperience with gate level simulations and delay modeling.\nExperience with constraint random verification.\nExperience with writing functional coverage and overall code coverage analysis.\nExperience with coverage-driven verification methodology.\nExperience in writing and debugging System Verilog assertions.\nStrong experience in debugging RTL and testbenches.\nPreferred Qualification:\nPrior experience in working with VIPs and verification environments that involve VIPs.\nPrior experience in verifying IPs/systems, which include PCI-E/DDR (any) protocol.\nExperience with SoC-level verification.\nExperience in using Continuous Integration tools such as Jenkins, Gitlab CI, Circle CI.\nExperience with synthesis tools such as Cadence Genus.\nExperience with power analysis tools such as Cadence Joules.\nExperience with equivalence checking tools such as Cadence Conformal.\nPrior Experience in working with Standard Cell libraries.\nExperience with scripting languages such as Perl/Python.\nAn ideal candidate is a person who is personable, self-motivated, and has excellent written and verbal communication skills.\nWhat’s in it for you?\nMake a difference: you will have the opportunity to join a well-funded fabless AI semiconductor startup that is disrupting the AI software and hardware co-design space. Be an integral part of its growth and momentum.\nBenefits and Perks\n· Highly competitive salary and stock options\n· Flex work time and ability to work fully remotely\n· Support for obtaining a visa and relocation support (in case of non-remote)","description_format":"text","description_chars":4260,"description_truncated":false,"requirements":{"experience_years_min":6,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Stock options"],"hiring_locations":[{"name":"Japan","iso":"JP","kind":"country"}],"hiring_excludes":[],"relocation_offered":true,"industries":["Processors, MCUs & AI Chips","Edge AI","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-12T20:56:16Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.191,"p_room":0.28,"age_days":638,"expected_fill_days":36,"reasons":["conf:1","stale_co","ghost","win:tail","crowd:"],"computed_at":"2026-10-27T05:46:45Z"},"pay":null,"html_url":"https://alion.io/job/edgecortix-japan-design-verification-engineer","json_url":"https://alion.io/job/edgecortix-japan-design-verification-engineer.json","meta":{"generated_at":"2026-10-27T06:13:10Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":6303,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-28T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":48043},"rest":"https://alion.io/mcp/rest/get_company?id=48043"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fedgecortix-japan-design-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fedgecortix-japan-design-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fedgecortix-japan-design-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/edgecortix-japan-design-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fedgecortix-japan-design-verification-engineer"}]}