{"id":1096860,"url":"https://alion.io/job/equal1-advanced-packaging-integration-lead","title":"Advanced Packaging & Integration Lead","company":{"id":673702,"name":"Equal1","domain":"equal1.com","url":"https://alion.io/company/equal1","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"C","score":56,"open_postings":11,"ghost_share":0.727,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-11-07T05:47:08Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Dublin, Ireland","Delft, Netherlands"],"countries":["IE","NL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":103000,"max_usd":234000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":796},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys HFSS","optional":false}],"status":"live","first_seen_at":"2026-09-21T17:37:28Z","employer_posted_date":"2026-09-21","last_verified_at":"2026-11-07T14:47:28Z","board_verified":true,"closed_at":null,"days_open":47,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":46},"description":"We are seeking an experienced Advanced Packaging & Integration Lead to join our team and develop packaging solutions for multi-chip silicon spin-qubit devices within a scalable quantum system.\nIn this role, you will work with a multidisciplinary team to drive the R&D of complex multi-chip modules utilising TSVs and micro-bumps, optimised for operation at millikelvin temperatures. You will have a significant influence on the physical architecture of next-generation quantum processors, shaping how advanced packaging subsystems integrate into the overall quantum computing solution.\nMain Duties and Responsibilities\nDrive the high-level strategy and architectural design of 3D integrated circuits and multi-chip quantum modules.\n\nDevelop advanced packaging solutions using TSVs, fine-pitch micro-bumps, and flip-chip bonding.\n\nEnsure packaging architectures and interconnects can withstand thermal cycling down to the millikelvin regime without delamination or loss of reliability.\n\nContribute to early-stage architecture and co-design activities, ensuring the advanced packaging subsystem scales with the requirements of the overall quantum system.\n\nDevelop simulation approaches to evaluate packaging and process options at DC and RF frequencies, including signal integrity, power integrity, thermal performance, and mechanical stress.\n\nBalance R&D execution with a strong focus on yield improvement, failure analysis, manufacturability, and long-term hardware reliability.\n\nOwn relevant technical activities with external suppliers, OSATs, and research partners.\n\nSupport the transfer of novel packaging designs into external manufacturing and advanced packaging lines.\n\nExperience and Qualifications\nRequired\nMaster’s or PhD in Electrical Engineering, Materials Science, Physics, Microelectronics, or a related field.\n\n7+ years’ experience in 3D integration and advanced packaging, including TSVs, fine-pitch micro-bumps, and flip-chip bonding.\n\nExperience with 3D-IC layout, planning, and simulation platforms for multi-die co-design, TSV floorplanning, and vertical interconnect planning.\n\nExperience with multi-physics analysis tools such as Ansys HFSS/Q3D or equivalent for signal/power integrity, RF analysis, and cryogenic structural/thermal stress.\n\nExperience managing technical transfers and working closely with external semiconductor advanced packaging facilities, OSATs, or research partners.\n\nProven ability to guide technical strategy and work effectively across multidisciplinary engineering teams.\n\nDesired\nExperience with cryogenic electronics, semiconductor physics, or silicon spin qubits.\n\nKnowledge of material behaviour at extreme temperatures, including superconductors and low-loss dielectrics.\n\nExperience leading or mentoring engineers in a high-tech, fast-paced R&D environment.","description_format":"text","description_chars":2812,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Ireland","iso":"IE","kind":"country"},{"name":"Netherlands","iso":"NL","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Quantum Science & Computing","Quantum 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