{"id":183683,"url":"https://alion.io/job/espace-fpga-design-engineer-avionics","title":"FPGA Design Engineer - Avionics","company":{"id":2438005,"name":"E-Space","domain":"e-space.com","url":"https://alion.io/company/e-space-com","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"C","score":68,"open_postings":105,"ghost_share":0.524,"stale_share":0,"repost_share":0.038,"time_to_fill_p50_days":52,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Saratoga, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":150000,"max":250000,"currency":"USD","period":"year","gross":null,"usd_annual":250000},"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"VHDL","optional":false},{"name":"Python","optional":true},{"name":"Siemens QuestaSim","optional":true},{"name":"TCL Scripting","optional":true}],"status":"live","first_seen_at":"2026-04-02T21:27:43Z","employer_posted_date":"2026-04-02","last_verified_at":"2026-10-21T11:19:01Z","board_verified":true,"closed_at":null,"days_open":201,"trust":{"level":"ghost","repost_count":1,"flags":["stale","company_stale"],"days_open":201},"description":"We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for satellite avionics systems. You will work across multiple boards and subsystems, designing RTL for flight computers, payload processing, communications, and sensor interfaces. The role requires strong digital design fundamentals and the ability to deliver reliable, radiation-tolerant FPGA designs for a space environment.\nKey Responsibilities:\nDesign and implement RTL in SystemVerilog or VHDL for satellite avionics FPGAs across a variety of FPGA platforms.\nDevelop AXI Memory-Mapped and AXI-Stream protocol implementations for inter-subsystem communication.\nPerform FPGA resource and size estimation including logic, memory, and DSP budgeting.\nImplement clock-domain-crossing (CDC) design techniques and verify timing closure across designs.\nDesign clock/reset tree architectures and manage timing-closure strategies for complex multi-clock designs.\nDevelop SPI, I²C, GPIO, and other low-speed peripheral interfaces alongside high-speed transceiver links.\nApply fault-tolerant digital design techniques including TMR, ECC, scrubbing, and SEE mitigation.\nPerform synthesis and place-and-route using vendor toolchains, including custom placement constraints.\nSupport board bring-up by developing configuration, interface verification, and debug test sequences.\nCollaborate with digital design, power, and PCB layout engineers to ensure FPGA support circuitry meets requirements.\nRequired Qualifications:\nBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.\n5+ years of FPGA design experience in aerospace, defense, or high-reliability systems.\nProficiency in SystemVerilog and/or VHDL for RTL design.\nExperience with FPGA synthesis, place-and-route, and timing closure workflows.\nDemonstrated knowledge of AXI or similar bus protocols and interface design.\nExperience with clock-domain crossing techniques, FIFO design, and multi-clock architectures.\nUnderstanding of radiation effects on FPGAs and mitigation strategies (TMR, ECC, scrubbing).\nPreferred Qualifications:\nExperience with a variety of FPGA platforms and vendor toolchains (e.g., flash-based, SRAM-based, anti-fuse architectures).\nBackground in signal processing (FFT, FIR/IIR filters) and DSP integration.\nExperience with transceiver design and high-speed serial communications on FPGAs.\nExposure to DAC/ADC interfaces and mixed-signal digital handling.\nExperience with satellite or spacecraft FPGA applications.\nProficiency in Python or TCL scripting for automation and build infrastructure.\nTools & Technologies:\nFPGA vendor toolchains (synthesis, place-and-route, timing analysis)\nRTL simulation tools (e.g., VCS, QuestaSim, or equivalent)\nPython, TCL, or shell scripting for build automation\nMakefiles for FPGA build workflows\nAdditional Requirements\nThis is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected.","description_format":"text","description_chars":3001,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Space & Aerospace","Satellite Manufacturing"],"lifecycle":[{"event":"open","at":"2026-09-01T08:47:55Z"},{"event":"reopen","at":"2026-10-14T07:11:13Z"}],"visa":[],"liveness":{"score":3,"band":"cold","label":"Long shot","p_open":0.4,"p_active":0.3,"p_room":0.28,"age_days":201,"expected_fill_days":52,"reasons":["seen:201","stale_co","velocity","ghost","win:tail","crowd:brand"],"computed_at":"2026-10-21T05:46:15Z"},"pay":{"stated_usd_annual":250000,"is_top_pay":true},"html_url":"https://alion.io/job/espace-fpga-design-engineer-avionics","json_url":"https://alion.io/job/espace-fpga-design-engineer-avionics.json","meta":{"generated_at":"2026-10-21T13:26:27Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":19028,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2438005},"rest":"https://alion.io/mcp/rest/get_company?id=2438005"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fespace-fpga-design-engineer-avionics"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fespace-fpga-design-engineer-avionics"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fespace-fpga-design-engineer-avionics"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/espace-fpga-design-engineer-avionics\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fespace-fpga-design-engineer-avionics"}]}