Salary
≈ $127k – $286k per year (Estimated)
Location
In office (Saratoga)
Employment
Full-Time
Confirmed on the employer's own hiring board on Oct 20, 2026. First seen by Alion on May 6, 2026. E-Space scores C on the Alion truth index.
Overview
Company
Impact
Profile match
Headquartered jointly in Toulouse, France, and Arlington, Texas, United States, E-Space is an aerospace and satellite communications enterprise specializing in sustainable low Earth orbit (LEO) mega-constellations and secure global data infrastructure. Founded in 2021 by satellite communications entrepreneur Greg Wyler (founder of O3b Networks and OneWeb), the company develops mass-manufacturable small satellites engineered with a debris-resilient architecture - designed to absorb impact without fragmenting, entrain untracked orbital debris, and cleanly deorbit at end-of-life to maintain orbital sustainability.
We are seeking an FPGA/VLSI engineer to contribute to digital hardware development targeting ASIC/SoC platforms used in advanced communication systems. This role focuses on RTL design, FPGA prototyping, and system integration, working closely with cross-functional teams to deliver high-quality designs.
Responsibilities:
- Design and implement RTL using SystemVerilog with consideration for timing, power, and area
- Perform FPGA prototyping, validation, and hardware bring-up for digital designs
- Develop and execute simulation and debugging strategies at block and subsystem levels
- Contribute to SoC-level integration, including interfacing with processors, memory, and peripherals
- Analyze and resolve timing issues, including setup/hold violations and basic clock domain crossing concerns
- Collaborate with verification, ASIC, and software teams to ensure functional correctness and performance
- Participate in design reviews and contribute to improving design quality and best practices
Qualifications:
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related field
- Strong experience writing synthesizable SystemVerilog/Verilog
- Proven experience with FPGA development flows, including synthesis, implementation, and validation
- Solid understanding of digital design fundamentals and timing analysis
Preferred Skills:
- Experience with SoC FPGA platforms (e.g., Xilinx Zynq, Intel SoC FPGA)
- Familiarity with AXI/AHB or similar bus protocols
- Exposure to ASIC design flow, including synthesis and STA
- Experience with high-speed interfaces (e.g., PCIe, Ethernet)
- Knowledge of communication systems (e.g., 5G PHY/MAC concepts)
What Success Looks Like:
- Independently handles well-defined design blocks from RTL to FPGA validation
- Produces clean, efficient, and timing-aware RTL
- Effectively debugs issues across simulation and hardware
- Collaborates well within a team and contributes to overall project progress
- Continuously improves technical depth and delivery efficiency
Additional Requirements
This is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected.
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