{"id":1209042,"url":"https://alion.io/job/espace-real-estate-senior-dsp-sw-engineer","title":"Senior DSP SW Engineer","company":{"id":2438005,"name":"E-Space","domain":"e-space.com","url":"https://alion.io/company/e-space-com","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Lever","truth_index":{"grade":"B","score":73,"open_postings":106,"ghost_share":0.358,"stale_share":0,"repost_share":0.047,"time_to_fill_p50_days":69,"computed_at":"2026-11-03T05:54:40Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":140000,"max":200000,"currency":"USD","period":"year","gross":null,"usd_annual":200000},"salary_estimate":null,"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"MATLAB","optional":false},{"name":"Python","optional":false},{"name":"SystemC","optional":false}],"status":"live","first_seen_at":"2026-09-24T20:27:44Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-11-03T17:32:16Z","board_verified":true,"closed_at":null,"days_open":39,"trust":{"level":"ok","repost_count":1,"flags":["company_stale"],"days_open":39},"description":"What you will do:\nIndependently own the design, implementation, and integration of a 5G NR physical-layer (PHY) subsystem for satellite non-terrestrial networks (NTN), translating system requirements into algorithms, firmware interfaces, and measurable acceptance criteria.\nDefine and execute PHY/link-level simulation studies for the subsystem, select representative NTN operating conditions and corner cases, and resolve tradeoffs among link performance, implementation complexity, latency, memory, and power.\nDeliver and optimize production DSP firmware for the subsystem, including real-time processing, data movement, and accelerator interaction. Work with ASIC engineers to reduce power through efficient computation, memory access, and power-state control while meeting real-time deadlines; diagnose performance bottlenecks and integration failures.\nOwn the subsystem's reference models and ASIC test-vector deliverables, including fixed-point behavior, interface specifications, automated comparisons, and regression coverage agreed with design and verification teams.\nContribute to SystemC transaction-level modeling (TLM) and high-level synthesis (HLS) development, including synthesizable implementations, with guidance from engineers experienced in these flows.\nDrive the subsystem's pre-silicon verification and new-chip bring-up activities, define tests and expected results, and resolve discrepancies across models, firmware, and hardware.\nReview algorithms, code, and test plans; mentor less experienced engineers and coordinate technical dependencies with ASIC, verification, and software teams.\nWhat you bring to this role:\nDemonstrated ability to design and deliver communication DSP algorithms, explain their performance limits, and make implementation tradeoffs using simulation and measured results.\nAbility to implement and debug numerical algorithms in C/C++, and to use Python or MATLAB for simulation, analysis, and test automation.\nPractical experience implementing 5G NR PHY functions and interpreting the relevant 3GPP specifications, with the ability to turn requirements into subsystem designs and validation plans.\nDemonstrated experience converting floating-point algorithms to fixed-point implementations, selecting numerical precision, and validating performance against a reference model.\nDemonstrated ownership of real-time embedded DSP software, including profiling, optimization, hardware/software integration, and systematic debugging on an embedded target. Experience developing low-power firmware in collaboration with ASIC designers and evaluating power, performance, and memory tradeoffs.\nAbility to build reproducible tests, use version control, document technical assumptions and results, and explain discrepancies during code and design reviews.\nEvidence of independently delivering a PHY subsystem or comparable modem capability through integration and validation, and improving others' work through technical reviews or mentoring.\nTypical background: BS with 7+ years, MS with 5+ years, or PhD with 3+ years of relevant experience in DSP, wireless communications, or embedded modem development, with a degree in Electrical Engineering, Computer Engineering, or a related field; equivalent demonstrated expertise is also welcome. These are guidelines, not mandatory minimums. Relevant doctoral research may count toward experience; demonstrated implementation and delivery capability remains essential.\nBonus points for the following:\nExperience building SystemC TLM models for hardware/software integration or performance analysis, or delivering synthesizable HLS blocks with verified functional behavior and evaluated latency, throughput, and resource use.\nExperience with 5G NR or NTN algorithms and specifications, satellite channel modeling, or compensation for Doppler and timing effects.\nExperience taking modem functions through pre-silicon verification and silicon bring-up, including correlation of simulation results with hardware measurements.\nExperience with 5G NR MAC, PHY/MAC interfaces, scheduling interactions, or HARQ procedures.\nExperience implementing and optimizing algorithms on vector DSPs, including SIMD intrinsics, vectorization, and efficient memory access.\nExperience validating ASIC power-management features through firmware, including clock or power gating, retention, and sleep/wake transitions under real-time constraints.\nAdditional Requirements\nThis is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected.","description_format":"text","description_chars":4572,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Space & Aerospace","Satellite Manufacturing"],"lifecycle":[{"event":"open","at":"2026-09-25T02:21:40Z"},{"event":"reopen","at":"2026-10-14T07:11:13Z"}],"visa":[],"liveness":{"score":81,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":0.9,"age_days":39,"expected_fill_days":69,"reasons":["conf:2","velocity","win:mid","comp:brand"],"computed_at":"2026-11-03T05:54:40Z"},"pay":{"stated_usd_annual":200000,"is_top_pay":true},"html_url":"https://alion.io/job/espace-real-estate-senior-dsp-sw-engineer","json_url":"https://alion.io/job/espace-real-estate-senior-dsp-sw-engineer.json","meta":{"generated_at":"2026-11-03T18:46:03Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":699,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-04T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2438005},"rest":"https://alion.io/mcp/rest/get_company?id=2438005"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fespace-real-estate-senior-dsp-sw-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fespace-real-estate-senior-dsp-sw-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fespace-real-estate-senior-dsp-sw-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/espace-real-estate-senior-dsp-sw-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fespace-real-estate-senior-dsp-sw-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":1209042}},{"tool":"search_jobs","arguments":{"company":"e-space.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":1209042},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); 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Docs: https://alion.io/developers"}}