{"id":16814,"url":"https://alion.io/job/etched-design-verification-engineer-soc","title":"Design Verification Engineer - SoC","company":{"id":5021,"name":"Etched","domain":"etched.com","url":"https://alion.io/company/etched","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"A","score":90,"open_postings":79,"ghost_share":0.076,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":162,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":150000,"max":275000,"currency":"USD","period":"year","gross":null,"usd_annual":275000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false}],"status":"live","first_seen_at":"2026-04-16T02:39:09Z","employer_posted_date":"2026-04-16","last_verified_at":"2026-10-18T08:47:06Z","board_verified":true,"closed_at":null,"days_open":185,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":185},"description":"About Etched\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\nJob Summary\nWe are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.\nKey responsibilities\nWork closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon).\n\nWork closely with software and application developers on identifying performance bottlenecks and tuning the software.\n\nDevelop test plans and test infrastructure/tools for performance tuning, correlation, and verification.\n\nImprove and maintain the architectural performance models.\n\nDevelop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model.\n\nDevelop SystemVerilog or Python-based checkers for verifying the performance features.\n\nDevelop coverage monitors and analyze coverage to ensure all performance features are covered.\n\nDebug performance issues and conduct performance tuning on silicon.\n\nDrive end-to-end performance tuning, ensuring optimal hardware utilization, software efficiency, and architectural alignment across the ASIC design lifecycle.\n\nYou may be a good fit if you have\nStrong understanding of digital design, RTL, and ASIC design flows.\n\nHands-on experience with performance verification, simulation, and modeling.\n\nComfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.\n\nSkilled in writing Python scripts for automation, data analysis, and performance modeling.\n\nExperience building and maintaining performance models for chip subsystems.\n\nUnderstanding of memory hierarchies, pipelines, interconnects, and compute accelerators.\n\nFamiliarity with performance bottleneck analysis, compiler optimizations, and workload tuning\n\nSome exposure to kernel level performance metrics and profiling tools.\n\nBenefits\nMedical, dental, and vision packages with generous premium coverage\n$500 per month credit for waiving medical benefits\n\nVarious wellness benefits covering fitness, mental health, and more\n\nDaily lunch + dinner in our office\n\nUnlimited compute budget subject to ROI justification\n\nHow we’re different\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\nWe greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\nThis role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.","description_format":"text","description_chars":3666,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Processors, MCUs & AI Chips","AI Compute & Inference","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-04-16T02:39:09Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 5","filings_12m":5,"filings_prev_12m":0,"green_card_filings_12m":0,"median_offered_wage_usd":173500,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)"],"filings_for_role_12m":5}],"liveness":{"score":26,"band":"fade","label":"Fading","p_open":1,"p_active":0.595,"p_room":0.44,"age_days":184,"expected_fill_days":162,"reasons":["conf:2","velocity","win:tail","crowd:"],"computed_at":"2026-10-17T05:46:00Z"},"pay":{"stated_usd_annual":275000,"is_top_pay":true},"html_url":"https://alion.io/job/etched-design-verification-engineer-soc","json_url":"https://alion.io/job/etched-design-verification-engineer-soc.json","meta":{"generated_at":"2026-10-18T10:19:39Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":15378,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":5021},"rest":"https://alion.io/mcp/rest/get_company?id=5021"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fetched-design-verification-engineer-soc"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fetched-design-verification-engineer-soc"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fetched-design-verification-engineer-soc"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/etched-design-verification-engineer-soc\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fetched-design-verification-engineer-soc"}]}