{"id":16810,"url":"https://alion.io/job/etched-pd-intern","title":"PD Intern","company":{"id":5021,"name":"Etched","domain":"etched.com","url":"https://alion.io/company/etched","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"A","score":90,"open_postings":79,"ghost_share":0.076,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":162,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"intern","employment_type":"internship","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":122000,"max_usd":357000,"period":"year","method":null,"sample_n":3689},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"LLM","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-05-19T22:31:56Z","employer_posted_date":"2026-05-19","last_verified_at":"2026-10-16T15:00:21Z","board_verified":true,"closed_at":null,"days_open":149,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":149},"description":"About Etched\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\nJob Summary\nAs a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns.\nYou may be a good fit if you have\nProgress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.\n\nFamiliarity with high-speed digital logic\n\nExposure to ASIC or SoC design concepts\n\nFamiliarity with SystemVerilog, UVM, or Python\n\nFamiliarity with verification work and writing test benches\n\nFamiliarity with physical design flows and tooling\n\nAre able to learn quickly about transformers and other aspects of modern artificial intelligence\n\nStrong candidates may also have experience with\nFamiliarity with modern ML and LLM model architectures\n\nFamiliarity with numerical representations and functions (RTL)\n\nFamiliarity with clocking and reset schemes (RTL/PD)\n\nUVM or formal verification experience (DV)\n\nAbility to program with Python or another scripting language\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\nProgram details\n12-week paid internship\n\nGenerous housing support for those relocating\n\nDaily lunch and dinner in our office\n\nBased at our office in San Jose, CA\n\nDirect mentorship from industry leaders and world-class engineers\n\nOpportunity to work on one of the most important problems of our time\n\nFor any questions, contact \nHow we’re different\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. 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