{"id":1426134,"url":"https://alion.io/job/ethernovia-senior-asic-front-end-design-engineer-2","title":"Senior ASIC (Front End) Design Engineer","company":{"id":673179,"name":"Ethernovia","domain":"ethernovia.com","url":"https://alion.io/company/ethernovia","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"D","score":53,"open_postings":24,"ghost_share":0.792,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Toronto, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":78000,"max_usd":141000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":64},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"C++","optional":false},{"name":"Perl","optional":false},{"name":"Physical AI","optional":false},{"name":"SystemVerilog","optional":false},{"name":"TCP/IP","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2024-10-05T01:49:14Z","employer_posted_date":"2026-09-28","last_verified_at":"2026-10-24T06:24:27Z","board_verified":true,"closed_at":null,"days_open":749,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":749},"description":"About Ethernovia, Inc.\nEthernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018, the company’s breakthrough data transport and acceleration technology is ushering in a new era of connectivity and capabilities in the vehicle and at the edge, including highly reliable autonomy, over-the-air servicing and AI-backed applications. \nEthernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds’ leading technology investors, having secured $154M ($90+M Series-B and $64M Series-A) in total funding to date:\nEthernovia Raises Over $90 Million Series B to Scale Leading-Edge Autonomy and Physical AI Networking Chips\n Ethernovia Raises $64 Million to Accelerate the Revolution of Vehicle Networks | Business Wire (financial backers include: Porsche SE, Qualcomm, AMD, Western Digital, Maverick Silicon, Socratic Partners, Conduit Capital, and CDIB-TEN Capital)\n\nEthernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025.\nMarch 2026: Ethernovia Announces HSB-Enabled Networking Board for NVIDIA Holoscan Platforms\nJanuary 2024: Our CEO Ramin Shirani Named MotorTrend Software-Defined Vehicle Innovator Awards Winner (ethernovia.com) \nSeptember 2023: Continental and Ethernovia Announce Partnership to Develop Automotive Switch in 7nm - Ethernovia\nConnected Car News: Helios, Continental, Ethernovia, Avanci, BMW, Mapbox, Porsche, SEMA, Honda, UltraSense, Flex Logix, Diodes Inc., Garmin, Toyota & Caruso | auto connected car news\nWith talented employees on 4 continents, we have filed 50+ patents to date.\nJoin Ethernovia’s team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles, robots and intelligent machines. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive cutting edge designs from concept to silicon to the future of mobility.\nSenior ASIC (Front End) Design Engineer\nSummary:\nAs a Senior ASIC (Front End) Design Engineer, you will be responsible for all aspects of digital SoC design, from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting target power, performance, and area goals.\nWork with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver advanced automotive communication semiconductors and systems.\nYou will be on the leading edge of the development and definition of advanced, high-performance custom silicon that embodies functions from a wide range of protocols, algorithms, and applications.\nExpected to flesh out product definitions with precise specifications of: an ASIC's internal and external interactions, data flow, processing algorithms across a number of disciplines, resource management, and software interfaces.\nYou will be a trusted self-starter who can work with very little guidance or oversight.\nThis position is located in: Toronto, Canada - Hybrid\nKey Qualifications:\nBS and/or MS in Electrical Engineering, Computer Science, or related field\nMinimum 10+ years of ASIC RTL design and/or architecture experience\nProven track record with the development of complex SoCs\nStrong understanding of digital design fundamentals and methodologies\nIn-depth knowledge of Verilog/System Verilog and simulation tools.\nSelf-motivated and able to work effectively both independently and in a team\nAdditional Success Factors:\nExperience in any of the following areas:\n Networking (Ethernet MAC, PHY/PCS, Switching, TCP/IP, PCIe and other industry standard protocols)\nDigital signal processing filters\nDigital Mixed-Signal modeling, design, and integration\nIP integration (SerDes, controllers, processors, etc.)\nVideo standards, protocols, processing\nPerl, TCL, C/C++, Make\nPersonal Skills:\nExcellent communication/documentation skills.\nAttention to details.\nCollaboration across multidisciplinary and international teams.\nWhat You Can Expect from Ethernovia:\nTechnology depth and breadth expansion that can’t be found in a large company\nOpportunity to grow your career as the company grows\nPre IPO stock options\nCutting edge technology\nWorld class team\nCompetitive base salary\nFlexible hours\nMedical, dental and vision insurance for employees","description_format":"text","description_chars":4746,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Stock options","Vision insurance"],"hiring_locations":[{"name":"Canada","iso":"CA","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Automotive Components"],"lifecycle":[{"event":"open","at":"2026-09-28T23:45:34Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.192,"p_room":0.28,"age_days":749,"expected_fill_days":36,"reasons":["conf:3","stale_co","ghost","win:tail","crowd:"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/ethernovia-senior-asic-front-end-design-engineer-2","json_url":"https://alion.io/job/ethernovia-senior-asic-front-end-design-engineer-2.json","meta":{"generated_at":"2026-10-24T07:03:28Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":10432,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":673179},"rest":"https://alion.io/mcp/rest/get_company?id=673179"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fethernovia-senior-asic-front-end-design-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fethernovia-senior-asic-front-end-design-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fethernovia-senior-asic-front-end-design-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/ethernovia-senior-asic-front-end-design-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fethernovia-senior-asic-front-end-design-engineer-2"}]}