{"id":3062893,"url":"https://alion.io/job/everspin-technologies-analog-design-engineer","title":"Analog Design Engineer","company":{"id":3060024,"name":"Everspin Technologies","domain":"everspin.com","url":"https://alion.io/company/everspin","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"ADP","truth_index":null},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"inferred","locations":[],"countries":[],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-09-14T19:00:00Z","employer_posted_date":"2026-09-14","last_verified_at":"2026-11-07T20:29:03Z","board_verified":true,"closed_at":null,"days_open":54,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":54},"description":"Analog Design Engineer\nAbout Everspin\nHeadquartered in Chandler, Arizona, Everspin Technologies (Nasdaq: MRAM) is the worldwide leader in designing, manufacturing, and commercially shipping discrete and embedded Magnetoresistive RAM (MRAM) into markets and applications where data persistence and integrity, low latency, and security are paramount. With over 120 Million MRAM products deployed in data center, cloud storage, energy, industrial, automotive, and transportation markets, Everspin has built the strongest and fastest growing foundation of MRAM users in the world. For more information, visit www.everspin.com.\nThe Role\nReporting to the Sr. Director of Design and based in our Austin, Texas location, s/he will work on innovative memory products.\nSpecific responsibilities will include:\nWork with analog team members for memory array design, defining array bias requirements, and developing the architecture \nHands-on work and ownership of multiple analog circuit building blocks, such as sense amplifiers, write and wordline drivers, charge pumps, bandgaps, op-amps, voltage regulators, IO drivers & receivers, oscillators, power supply detectors, and current distribution networks \nDrive low power, low noise design techniques, and high precision bias techniques in presence of device mismatch and process variation\nWork with product and test engineers for test plans and reviewing lab test results to drive bug fixes and yield improvements\nRun analog design verification flows (e.g. spice, fast-spice, electromigration, IR drop, aging, etc.) to verify a design is ready for tape-out\nDocument design simulation and verification for formal design reviews\nSupport layout designers and drive final layout through post-layout and top-level simulations to validate top-level integration.\nQualifications & competencies\nMS or higher degree in Electrical or Computer Engineering or Computer Science desired\nExperience in analog circuit design with a proven track record of memory, bias circuits design in silicon\nDeep understanding of transistor operation, device physics, and analog design techniques \nStrong circuit analysis skills (e.g., AC/DC/Transient circuit analysis, small signal circuit techniques, feedback compensation, statistics, etc.)\nKnowledge of memory interface protocols, such as SPI and DDR, and Cadence tools are preferred but not required.\nMust have strong communication skills and be a team player\nUnquestionable ethics - treats people with respect; keeps commitments; inspires the trust of others; works with integrity.\nCommitment to our core values of Leadership, Innovation, Communication, Persistence, Enthusiasm, and Respect\nContact us:\nhttps://www.everspin.com/careers-everspin","description_format":"text","description_chars":2711,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Hardware","Manufacturing","Memory & Storage Chips"],"lifecycle":[{"event":"open","at":"2026-10-22T07:09:13Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 1","filings_12m":1,"filings_prev_12m":1,"green_card_filings_12m":0,"median_offered_wage_usd":142500,"route":null,"cap_exempt":false,"checked_at":"2026-11-07T07:57:00+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":17,"band":"cold","label":"Long shot","p_open":1,"p_active":0.488,"p_room":0.35,"age_days":53,"expected_fill_days":25,"reasons":["conf:0","win:tail"],"computed_at":"2026-11-07T05:47:08Z"},"pay":null,"html_url":"https://alion.io/job/everspin-technologies-analog-design-engineer","json_url":"https://alion.io/job/everspin-technologies-analog-design-engineer.json","meta":{"generated_at":"2026-11-07T23:34:01Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":39278,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-08T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3060024},"rest":"https://alion.io/mcp/rest/get_company?id=3060024"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Feverspin-technologies-analog-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Feverspin-technologies-analog-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Feverspin-technologies-analog-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/everspin-technologies-analog-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Feverspin-technologies-analog-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3062893}},{"tool":"search_jobs","arguments":{"company":"everspin.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3062893},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); 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