{"id":732687,"url":"https://alion.io/job/falcomm-asic-engineer","title":"ASIC Engineer","company":{"id":673289,"name":"Falcomm","domain":"falcomm.com","url":"https://alion.io/company/falcomm","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workable","truth_index":{"grade":"D","score":47,"open_postings":18,"ghost_share":0.889,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-09-29T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Atlanta, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":101000,"max_usd":232000,"period":"year","method":"role_country_seniority_unknown","sample_n":1828},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-03-12T00:00:00Z","employer_posted_date":"2026-03-12","last_verified_at":"2026-09-29T04:27:14Z","board_verified":true,"closed_at":null,"days_open":202,"trust":{"level":"ghost","repost_count":0,"flags":["stale","company_stale"],"days_open":201},"description":"Are you passionate about building advanced semiconductor systems that power next-generation wireless technologies? At Falcomm, we are transforming innovative semiconductor research into real-world products through energy-efficient RF power amplifier and wireless solutions. Our mission is to push the boundaries of performance, efficiency, and integration in modern communication systems.\nFalcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital integrated circuits that interface with our RF technologies. This role will contribute to the design, implementation, and verification of ASIC components within larger system-on-chip platforms. The position requires strong collaboration with RFIC, analog, verification, and system engineering teams to deliver high-performance silicon solutions.\nResponsibilities:\nDesign and implement digital and/or mixed-signal ASIC blocks from specification to tapeout \n Develop RTL (Verilog/SystemVerilog) and/or transistor-level designs depending on focus area \n Collaborate with RFIC, analog, and system engineers to integrate digital logic within RF and mixed-signal chip architectures.\n Perform synthesis, timing closure, and power optimization \n Work with verification engineers to define testbenches and ensure robust design validation \nSupport functional verification and debugging of ASIC components in collaboration with verification teams.\nAssist with synthesis, timing analysis, and physical implementation activities to ensure design readiness for tape-out.\nContribute to silicon bring-up, debugging, and post-silicon validation activities.\nDocument design architecture, implementation details, and verification results.\nRequirements\nBachelor’s or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.\n1-3 years of experience developing and implementing in ASIC design.\nStrong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design\nSolid understanding of digital design fundamentals (timing, clocking, power, etc.)\nExperience with ASIC tool flows (e.g., Synopsys, Cadence, or similar)\nFamiliarity with verification methodologies (UVM is a plus)\nStrong problem-solving skills and ability to work across disciplines\nMust be willing to work full-time, onsite, in Atlanta, GA. \nPreferred Skills\nStrong problem-solving skills in complex digital design areas such as clock domain crossing, timing optimization, and low-power design techniques.\nHands-on experience with industry EDA tools including HDL simulators, linting tools, and FPGA development platforms.\nProficiency in scripting languages such as Python or TCL to support design automation and verification workflows.\nBenefits\nCompetitive Salary and Equity Package\nComprehensive Health, Dental, and Vision Insurance\n401(k) Retirement Plan\nPaid Time Off (PTO) and Sick Leave\nDisclosure:\nFalcomm is an Equal Opportunity Employer; employment with Falcomm is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.\nApplicants wishing to view a copy of Falcomm’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify Falcomm.\nTo conform to U.S. Government export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.","description_format":"text","description_chars":3847,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity","Retirement plans","Vision insurance"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["RF & Wireless Hardware","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-09-11T10:11:59Z"}],"liveness":{"score":4,"band":"cold","label":"Long shot","p_open":1,"p_active":0.138,"p_room":0.28,"age_days":201,"expected_fill_days":38,"reasons":["conf:1","stale_co","ghost","win:tail","crowd:"],"computed_at":"2026-09-29T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/falcomm-asic-engineer","json_url":"https://alion.io/job/falcomm-asic-engineer.json","meta":{"generated_at":"2026-09-30T00:31:49Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":316,"day_limit":5000,"remaining_today":4684,"minute_limit":60,"resets_at":"2026-10-01T00:00:00Z"}}}