{"id":136898,"url":"https://alion.io/job/furiosa-systems-software-engineer-npu-management-interface","title":"Systems Software Engineer, NPU Management Interface","company":{"id":31683,"name":"FuriosaAI","domain":"furiosa.ai","url":"https://alion.io/company/furiosa","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"A","score":100,"open_postings":41,"ghost_share":0,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":28,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Backend","role_family":"Backend","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Seoul, South Korea"],"countries":["KR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Embedded C","optional":false},{"name":"RTOS","optional":false},{"name":"C","optional":true},{"name":"HPC","optional":true}],"status":"live","first_seen_at":"2026-08-19T12:41:41Z","employer_posted_date":"2026-10-21","last_verified_at":"2026-10-27T16:51:28Z","board_verified":true,"closed_at":null,"days_open":69,"trust":{"level":"ok","repost_count":1,"flags":[],"days_open":68},"description":"About FuriosaAI\nFuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, along with a compiler-focused R&D lab in Lisbon. \nOur vision is to make AI computing sustainable, enabling access to powerful AI for everyone on Earth. We solve the AI hardware energy and operational cost crisis at the architectural level, rather than through brute force, building the world's first truly AI-native compute platform to unlock the full potential of artificial intelligence for every enterprise.\nKey Responsibilities\nDesign and develop the NPU Management Interface (MI) firmware/software enabling communication between Host/BMC and NPU devices\n\nImplement and maintain MCTP, PLDM, and custom MI command handling for out-of-band NPU management, monitoring, and control\n\nDevelop device-management features over SMBus/I²C, I3C, PCIe VDM, or custom sideband channels\n\nIntegrate MI functionality into the NPU firmware, including:\nHealth and error reporting\n\nThermal and power telemetry\n\nRuntime status, utilization metrics, and debug information\n\nEnsure compliance with industry specifications by performing spec-driven design, implementation, and validation\n\nSupport bring-up, interoperability testing, rack-scale platform integration, and system-level validation\n\nDevelop test strategies and validation tools based on MCTP and PLDM specifications\n\nPerform protocol compliance testing, regression testing, and interoperability verification\n\nMinimum Qualifications\nStrong proficiency in embedded C or C++\n\nExperience with firmware development for NPU/accelerator, GPU, or SoC\n\nUnderstanding of management protocols including MCTP (over I²C/SMBus, I3C or PCIe VDM) and PLDM\n\nExperience with low-level interfaces: SMBus/I²C, I3C, SPI, PCIe\n\nAbility to interpret complex protocol specifications and convert them into robust implementations\n\nFamiliarity with device telemetry, sensor frameworks, watchdog/reset flows, and health monitoring\n\nExperience with system-level debugging using logic/protocol analyzers and low-level debug tools\n\nKnowledge of embedded systems, bare-metal or RTOS environments, and firmware lifecycle flows\n\nPreferred Qualifications\nExperience of BMC firmware stacks such as OpenBMC, Redfish, IPMI, and PLDM device-model implementations\n\nBackground in spec creation, requirement definition, or standards compliance validation\n\nExperience defining FRU data, power/thermal management policies, and diagnostics frameworks\n\nFamiliarity with secure provisioning, firmware update mechanisms, and lifecycle state management\n\nExperience with large-scale datacenter or HPC system integration (rack-level management, telemetry aggregation)\n\nContributions to firmware for accelerator, MCTP/PLDM implementations, or open-source system firmware projects\n\nWhy Join FuriosaAI\nThe defining bottleneck of the AI era is building the right hardware and software stack to run it at global scale. Furiosa is solving this challenge holistically from the ground up.\nWith our flagship chip, RNGD, in mass production today and our next-generation platform in development with Broadcom, we are proving that full-stack, tensor-native compute is the future of AI infrastructure. This is a pivotal moment to join our team, right as we accelerate our global expansion.\nAt Furiosa, you will:\nSolve AI’s Most Urgent Challenge. Help build the high-performance, energy-efficient inference hardware and software required to fulfill the promise of advanced AI.\nPioneer Full-Stack Co-Design. Work with teams that are architecting solutions from silicon up through the compiler (featuring innovations like Tensor Contraction Language and Virtual ISA) and serving frameworks.\nShip Real-World Silicon, Software, and Solutions. Turn breakthrough technology into commercial deployment. RNGD is in mass production with TSMC and running live enterprise workloads for global leaders like LG AI Research and Samsung SDS.\nPartner With the Industry's Best. Collaborate across an elite global ecosystem that includes TSMC, Broadcom, SK Hynix, and GUC.\nDo Your Life’s Best Work. Join a brilliant, low-ego, mission-driven team in a high-trust environment that values autonomy, intellectual curiosity, and shared ambition. \nContact\n ","description_format":"text","description_chars":4365,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-08-19T12:41:41Z"},{"event":"close","at":"2026-09-08T06:54:36Z"},{"event":"reopen","at":"2026-10-21T17:33:40Z"}],"visa":[],"liveness":{"score":10,"band":"cold","label":"Long shot","p_open":1,"p_active":0.362,"p_room":0.28,"age_days":68,"expected_fill_days":28,"reasons":["conf:2","win:tail","crowd:"],"computed_at":"2026-10-27T05:46:45Z"},"pay":null,"html_url":"https://alion.io/job/furiosa-systems-software-engineer-npu-management-interface","json_url":"https://alion.io/job/furiosa-systems-software-engineer-npu-management-interface.json","meta":{"generated_at":"2026-10-27T18:08:23Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":7956,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-28T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":31683},"rest":"https://alion.io/mcp/rest/get_company?id=31683"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Ffuriosa-systems-software-engineer-npu-management-interface"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Ffuriosa-systems-software-engineer-npu-management-interface"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Ffuriosa-systems-software-engineer-npu-management-interface"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/furiosa-systems-software-engineer-npu-management-interface\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Ffuriosa-systems-software-engineer-npu-management-interface"}]}